Commodore 64 KERNAL ($03) ROM dissasembly Version 1.0 (June 1994) ; continuation of EXP function E000 85 56 STA $56 E002 20 0F BC JSR $BC0F E005 A5 61 LDA $61 E007 C9 88 CMP #$88 E009 90 03 BCC $E00E E00B 20 D4 BA JSR $BAD4 E00E 20 CC BC JSR $BCCC E011 A5 07 LDA $07 E013 18 CLC E014 69 81 ADC #$81 E016 F0 F3 BEQ $E00B E018 38 SEC E019 E9 01 SBC #$01 E01B 48 PHA E01C A2 05 LDX #$05 E01E B5 69 LDA $69,X E020 B4 61 LDY $61,X E022 95 61 STA $61,X E024 94 69 STY $69,X E026 CA DEX E027 10 F5 BPL $E01E E029 A5 56 LDA $56 E02B 85 70 STA $70 E02D 20 53 B8 JSR $B853 E030 20 B4 BF JSR $BFB4 E033 A9 C4 LDA #$C4 E035 A0 BF LDY #$BF E037 20 59 E0 JSR $E059 E03A A9 00 LDA #$00 E03C 85 6F STA $6F E03E 68 PLA E03F 20 B9 BA JSR $BAB9 E042 60 RTS ; compute odd degrees for SIN and ATN E043 85 71 STA $71 E045 84 72 STY $72 E047 20 CA BB JSR $BBCA E04A A9 57 LDA #$57 E04C 20 28 BA JSR $BA28 E04F 20 5D E0 JSR $E05D E052 A9 57 LDA #$57 E054 A0 00 LDY #$00 E056 4C 28 BA JMP $BA28 ; compute polynomials according to table indexed by AY E059 85 71 STA $71 E05B 84 72 STY $72 E05D 20 C7 BB JSR $BBC7 E060 B1 71 LDA ($71),Y E062 85 67 STA $67 E064 A4 71 LDY $71 E066 C8 INY E067 98 TYA E068 D0 02 BNE $E06C E06A E6 72 INC $72 E06C 85 71 STA $71 E06E A4 72 LDY $72 E070 20 28 BA JSR $BA28 E073 A5 71 LDA $71 E075 A4 72 LDY $72 E077 18 CLC E078 69 05 ADC #$05 E07A 90 01 BCC $E07D E07C C8 INY E07D 85 71 STA $71 E07F 84 72 STY $72 E081 20 67 B8 JSR $B867 E084 A9 5C LDA #$5C E086 A0 00 LDY #$00 E088 C6 67 DEC $67 E08A D0 E4 BNE $E070 E08C 60 RTS ; float numbers for RND E08D .BY $98,$35,$44,$7A,$00 E092 .BY $68,$28,$B1,$46,$00 ; RND function E097 20 2B BC JSR $BC2B E09A 30 37 BMI $E0D3 E09C D0 20 BNE $E0BE E09E 20 F3 FF JSR $FFF3 E0A1 86 22 STX $22 E0A3 84 23 STY $23 E0A5 A0 04 LDY #$04 E0A7 B1 22 LDA ($22),Y E0A9 85 62 STA $62 E0AB C8 INY E0AC B1 22 LDA ($22),Y E0AE 85 64 STA $64 E0B0 A0 08 LDY #$08 E0B2 B1 22 LDA ($22),Y E0B4 85 63 STA $63 E0B6 C8 INY E0B7 B1 22 LDA ($22),Y E0B9 85 65 STA $65 E0BB 4C E3 E0 JMP $E0E3 E0BE A9 8B LDA #$8B E0C0 A0 00 LDY #$00 E0C2 20 A2 BB JSR $BBA2 E0C5 A9 8D LDA #$8D E0C7 A0 E0 LDY #$E0 E0C9 20 28 BA JSR $BA28 E0CC A9 92 LDA #$92 E0CE A0 E0 LDY #$E0 E0D0 20 67 B8 JSR $B867 E0D3 A6 65 LDX $65 E0D5 A5 62 LDA $62 E0D7 85 65 STA $65 E0D9 86 62 STX $62 E0DB A6 63 LDX $63 E0DD A5 64 LDA $64 E0DF 85 63 STA $63 E0E1 86 64 STX $64 E0E3 A9 00 LDA #$00 E0E5 85 66 STA $66 E0E7 A5 61 LDA $61 E0E9 85 70 STA $70 E0EB A9 80 LDA #$80 E0ED 85 61 STA $61 E0EF 20 D7 B8 JSR $B8D7 E0F2 A2 8B LDX #$8B E0F4 A0 00 LDY #$00 E0F6 4C D4 BB JMP $BBD4 ; handle errors for direct I/O ; calls from basic E0F9 C9 F0 CMP #$F0 E0FB D0 07 BNE $E104 E0FD 84 38 STY $38 E0FF 86 37 STX $37 E101 4C 63 A6 JMP $A663 E104 AA TAX E105 D0 02 BNE $E109 E107 A2 1E LDX #$1E E109 4C 37 A4 JMP $A437 E10C 20 D2 FF JSR $FFD2 E10F B0 E8 BCS $E0F9 E111 60 RTS E112 20 CF FF JSR $FFCF E115 B0 E2 BCS $E0F9 E117 60 RTS E118 20 AD E4 JSR $E4AD E11B B0 DC BCS $E0F9 E11D 60 RTS E11E 20 C6 FF JSR $FFC6 E121 B0 D6 BCS $E0F9 E123 60 RTS E124 20 E4 FF JSR $FFE4 E127 B0 D0 BCS $E0F9 E129 60 RTS ; SYS command E12A 20 8A AD JSR $AD8A E12D 20 F7 B7 JSR $B7F7 E130 A9 E1 LDA #$E1 ; low E146 E132 48 PHA E133 A9 46 LDA #$46 ; high E146 E135 48 PHA E136 AD 0F 03 LDA $030F E139 48 PHA E13A AD 0C 03 LDA $030C E13D AE 0D 03 LDX $030D E140 AC 0E 03 LDY $030E E143 28 PLP E144 6C 14 00 JMP ($0014) E147 08 PHP E148 8D 0C 03 STA $030C E14B 8E 0D 03 STX $030D E14E 8C 0E 03 STY $030E E151 68 PLA E152 8D 0F 03 STA $030F E155 60 RTS ; SAVE command E156 20 D4 E1 JSR $E1D4 E159 A6 2D LDX $2D E15B A4 2E LDY $2E E15D A9 2B LDA #$2B E15F 20 D8 FF JSR $FFD8 E162 B0 95 BCS $E0F9 E164 60 RTS ; VERIFY command E165 A9 01 LDA #$01 E167 .BY $2C ; LOAD command E168 A9 00 LDA #$00 E16A 85 0A STA $0A E16C 20 D4 E1 JSR $E1D4 E16F A5 0A LDA $0A E171 A6 2B LDX $2B E173 A4 2C LDY $2C E175 20 D5 FF JSR $FFD5 E178 B0 57 BCS $E1D1 E17A A5 0A LDA $0A E17C F0 17 BEQ $E195 E17E A2 1C LDX #$1C E180 20 B7 FF JSR $FFB7 E183 29 10 AND #$10 E185 D0 17 BNE $E19E E187 A5 7A LDA $7A E189 C9 02 CMP #$02 E18B F0 07 BEQ $E194 E18D A9 64 LDA #$64 E18F A0 A3 LDY #$A3 E191 4C 1E AB JMP $AB1E E194 60 RTS E195 20 B7 FF JSR $FFB7 E198 29 BF AND #$BF E19A F0 05 BEQ $E1A1 E19C A2 1D LDX #$1D E19E 4C 37 A4 JMP $A437 E1A1 A5 7B LDA $7B E1A3 C9 02 CMP #$02 E1A5 D0 0E BNE $E1B5 E1A7 86 2D STX $2D E1A9 84 2E STY $2E E1AB A9 76 LDA #$76 E1AD A0 A3 LDY #$A3 E1AF 20 1E AB JSR $AB1E E1B2 4C 2A A5 JMP $A52A E1B5 20 8E A6 JSR $A68E E1B8 20 33 A5 JSR $A533 E1BB 4C 77 A6 JMP $A677 ; OPEN command E1BE 20 19 E2 JSR $E219 E1C1 20 C0 FF JSR $FFC0 E1C4 B0 0B BCS $E1D1 E1C6 60 RTS ; CLOSE command E1C7 20 19 E2 JSR $E219 E1CA A5 49 LDA $49 E1CC 20 C3 FF JSR $FFC3 E1CF 90 C3 BCC $E194 E1D1 4C F9 E0 JMP $E0F9 ; set parameters for load/verify/save E1D4 A9 00 LDA #$00 E1D6 20 BD FF JSR $FFBD E1D9 A2 01 LDX #$01 E1DB A0 00 LDY #$00 E1DD 20 BA FF JSR $FFBA E1E0 20 06 E2 JSR $E206 E1E3 20 57 E2 JSR $E257 E1E6 20 06 E2 JSR $E206 E1E9 20 00 E2 JSR $E200 E1EC A0 00 LDY #$00 E1EE 86 49 STX $49 E1F0 20 BA FF JSR $FFBA E1F3 20 06 E2 JSR $E206 E1F6 20 00 E2 JSR $E200 E1F9 8A TXA E1FA A8 TAY E1FB A6 49 LDX $49 E1FD 4C BA FF JMP $FFBA ; skip comma and get integer in X E200 20 0E E2 JSR $E20E E203 4C 9E B7 JMP $B79E ; get character and check for end of line E206 20 79 00 JSR $0079 E209 D0 02 BNE $E20D E20B 68 PLA E20C 68 PLA E20D 60 RTS ; check for comma and skip it E20E 20 FD AE JSR $AEFD E211 20 79 00 JSR $0079 E214 D0 F7 BNE $E20D E216 4C 08 AF JMP $AF08 ; get open/close parameters E219 A9 00 LDA #$00 E21B 20 BD FF JSR $FFBD E21E 20 11 E2 JSR $E211 E221 20 9E B7 JSR $B79E E224 86 49 STX $49 E226 8A TXA E227 A2 01 LDX #$01 E229 A0 00 LDY #$00 E22B 20 BA FF JSR $FFBA E22E 20 06 E2 JSR $E206 E231 20 00 E2 JSR $E200 E234 86 4A STX $4A E236 A0 00 LDY #$00 E238 A5 49 LDA $49 E23A E0 03 CPX #$03 E23C 90 01 BCC $E23F E23E 88 DEY E23F 20 BA FF JSR $FFBA E242 20 06 E2 JSR $E206 E245 20 00 E2 JSR $E200 E248 8A TXA E249 A8 TAY E24A A6 4A LDX $4A E24C A5 49 LDA $49 E24E 20 BA FF JSR $FFBA E251 20 06 E2 JSR $E206 E254 20 0E E2 JSR $E20E E257 20 9E AD JSR $AD9E E25A 20 A3 B6 JSR $B6A3 E25D A6 22 LDX $22 E25F A4 23 LDY $23 E261 4C BD FF JMP $FFBD ; COS function E264 A9 E0 LDA #$E0 ; low E2E0 E266 A0 E2 LDY #$E2 ; high E2E0 E268 20 67 B8 JSR $B867 ; SIN function E26B 20 0C BC JSR $BC0C E26E A9 E5 LDA #$E5 ; low E2E5 E270 A0 E2 LDY #$E2 ; high E2E5 E272 A6 6E LDX $6E E274 20 07 BB JSR $BB07 E277 20 0C BC JSR $BC0C E27A 20 CC BC JSR $BCCC E27D A9 00 LDA #$00 E27F 85 6F STA $6F E281 20 53 B8 JSR $B853 E284 A9 EA LDA #$EA ; low E2EA E286 A0 E2 LDY #$E2 ; high E2EA E288 20 50 B8 JSR $B850 E28B A5 66 LDA $66 E28D 48 PHA E28E 10 0D BPL $E29D E290 20 49 B8 JSR $B849 E293 A5 66 LDA $66 E295 30 09 BMI $E2A0 E297 A5 12 LDA $12 E299 49 FF EOR #$FF E29B 85 12 STA $12 E29D 20 B4 BF JSR $BFB4 E2A0 A9 EA LDA #$EA ; low E2EA E2A2 A0 E2 LDY #$E2 ; high E2EA E2A4 20 67 B8 JSR $B867 E2A7 68 PLA E2A8 10 03 BPL $E2AD E2AA 20 B4 BF JSR $BFB4 E2AD A9 EF LDA #$EF E2AF A0 E2 LDY #$E2 E2B1 4C 43 E0 JMP $E043 ; TAN function E2B4 20 CA BB JSR $BBCA E2B7 A9 00 LDA #$00 E2B9 85 12 STA $12 E2BB 20 6B E2 JSR $E26B E2BE A2 4E LDX #$4E ; low 004E E2C0 A0 00 LDY #$00 ; high 004E E2C2 20 F6 E0 JSR $E0F6 E2C5 A9 57 LDA #$57 ; low 005F E2C7 A0 00 LDY #$00 ; high 005F E2C9 20 A2 BB JSR $BBA2 E2CC A9 00 LDA #$00 E2CE 85 66 STA $66 E2D0 A5 12 LDA $12 E2D2 20 DC E2 JSR $E2DC E2D5 A9 4E LDA #$4E ; low 004E E2D7 A0 00 LDY #$00 ; high 004E E2D9 4C 0F BB JMP $BB0F E2DC 48 PHA E2DD 4C 9D E2 JMP $E29D ; float numbers for SIN, COS and TAN ; 0.5 * PI E2E0 .BY $81,$49,$0F,$DA,$A2 ; 2 * PI E2E5 .BY $83,$49,$0F,$DA,$A2 ; 0,25 E2EA .BY $7F,$00,$00,$00,$00 ; polynomial table E2EF .BY $05 ; degree 6 E2F0 .BY $84,$E6,$1A,$2D,$1B E2F5 .BY $86,$28,$07,$FB,$F8 E2FA .BY $87,$99,$68,$89,$01 E2FF .BY $87,$23,$35,$DF,$E1 E304 .BY $86,$A5,$5D,$E7,$28 E309 .BY $83,$49,$0F,$DA,$A2 ; ATN function E30E A5 66 LDA $66 E310 48 PHA E311 10 03 BPL $E316 E313 20 B4 BF JSR $BFB4 E316 A5 61 LDA $61 E318 48 PHA E319 C9 81 CMP #$81 E31B 90 07 BCC $E324 E31D A9 BC LDA #$BC ; low B9BC E31F A0 B9 LDY #$B9 ; high B9BC E321 20 0F BB JSR $BB0F E324 A9 3E LDA #$3E ; low E33E E326 A0 E3 LDY #$E3 ; high E33E E328 20 43 E0 JSR $E043 E32B 68 PLA E32C C9 81 CMP #$81 E32E 90 07 BCC $E337 E330 A9 E0 LDA #$E0 ; low E2E0 E332 A0 E2 LDY #$E2 ; high E2E0 E334 20 50 B8 JSR $B850 E337 68 PLA E338 10 03 BPL $E33D E33A 4C B4 BF JMP $BFB4 E33D 60 RTS ; float numbers for ATN ; polynomial table E33E .BY $0B ; degree 12 E33F .BY $76,$B3,$83,$BD,$D3 E344 .BY $79,$1E,$F4,$A6,$F5 E349 .BY $7B,$83,$FC,$B0,$10 E34E .BY $7C,$0C,$1F,$67,$CA E353 .BY $7C,$DE,$53,$CB,$C1 E358 .BY $7D,$14,$64,$70,$4C E35D .BY $7D,$B7,$EA,$51,$7A E362 .BY $7D,$63,$30,$88,$7E E367 .BY $7E,$92,$44,$99,$3A E36C .BY $7E,$4C,$CC,$91,$C7 E371 .BY $7F,$AA,$AA,$AA,$13 E376 .BY $81,$00,$00,$00,$00 ; warm start entry E37B 20 CC FF JSR $FFCC E37E A9 00 LDA #$00 E380 85 13 STA $13 E382 20 7A A6 JSR $A67A E385 58 CLI E386 A2 80 LDX #$80 E388 6C 00 03 JMP ($0300) ; normally E38B ; handle error messages E38B 8A TXA E38C 30 03 BMI $E391 E38E 4C 3A A4 JMP $A43A E391 4C 74 A4 JMP $A474 ; RESET routine E394 20 53 E4 JSR $E453 E397 20 BF E3 JSR $E3BF E39A 20 22 E4 JSR $E422 E39D A2 FB LDX #$FB E39F 9A TXS E3A0 D0 E4 BNE $E386 ; character fetch code for zero page $0073-$008F E3A2 E6 7A INC $7A E3A4 D0 02 BNE $E3A8 E3A6 E6 7B INC $7B E3A8 AD 60 EA LDA $EA60 E3AB C9 3A CMP #$3A ; colon E3AD B0 0A BCS $E3B9 E3AF C9 20 CMP #$20 ; space E3B1 F0 EF BEQ $E3A2 E3B3 38 SEC E3B4 E9 30 SBC #$30 ; 0 E3B6 38 SEC E3B7 E9 D0 SBC #$D0 E3B9 60 RTS ; first RND seed value E3BA .BY $80,$4F,$C7,$52,$58 ; initialisation of basic E3BF A9 4C LDA #$4C E3C1 85 54 STA $54 E3C3 8D 10 03 STA $0310 E3C6 A9 48 LDA #$48 ; low B248 E3C8 A0 B2 LDY #$B2 ; high B248 E3CA 8D 11 03 STA $0311 E3CD 8C 12 03 STY $0312 E3D0 A9 91 LDA #$91 ; lowh B391 E3D2 A0 B3 LDY #$B3 ; high B391 E3D4 85 05 STA $05 E3D6 84 06 STY $06 E3D8 A9 AA LDA #$AA ; low B1AA E3DA A0 B1 LDY #$B1 ; high B1AA E3DC 85 03 STA $03 E3DE 84 04 STY $04 E3E0 A2 1C LDX #$1C E3E2 BD A2 E3 LDA $E3A2,X E3E5 95 73 STA $73,X E3E7 CA DEX E3E8 10 F8 BPL $E3E2 E3EA A9 03 LDA #$03 E3EC 85 53 STA $53 E3EE A9 00 LDA #$00 E3F0 85 68 STA $68 E3F2 85 13 STA $13 E3F4 85 18 STA $18 E3F6 A2 01 LDX #$01 E3F8 8E FD 01 STX $01FD E3FB 8E FC 01 STX $01FC E3FE A2 19 LDX #$19 E400 86 16 STX $16 E402 38 SEC E403 20 9C FF JSR $FF9C E406 86 2B STX $2B E408 84 2C STY $2C E40A 38 SEC E40B 20 99 FF JSR $FF99 E40E 86 37 STX $37 E410 84 38 STY $38 E412 86 33 STX $33 E414 84 34 STY $34 E416 A0 00 LDY #$00 E418 98 TYA E419 91 2B STA ($2B),Y E41B E6 2B INC $2B E41D D0 02 BNE $E421 E41F E6 2C INC $2C E421 60 RTS ; print BASIC start up messages E422 A5 2B LDA $2B E424 A4 2C LDY $2C E426 20 08 A4 JSR $A408 E429 A9 73 LDA #$73 ; low E473 E42B A0 E4 LDY #$E4 ; high E473 E42D 20 1E AB JSR $AB1E E430 A5 37 LDA $37 E432 38 SEC E433 E5 2B SBC $2B E435 AA TAX E436 A5 38 LDA $38 E438 E5 2C SBC $2C E43A 20 CD BD JSR $BDCD E43D A9 60 LDA #$60 ; low E460 E43F A0 E4 LDY #$E4 ; high E460 E441 20 1E AB JSR $AB1E E444 4C 44 A6 JMP $A644 ; vectors for $0300-$030B E447 .WD $E38B E449 .WD $A483 E44B .WD $A57C E44D .WD $A71A E44F .WD $A7E4 E451 .WD $AE86 ; initialise vectors E453 A2 0B LDX #$0B E455 BD 47 E4 LDA $E447,X E458 9D 00 03 STA $0300,X E45B CA DEX E45C 10 F7 BPL $E455 E45E 60 RTS ; startup messages E45F .BY $00 ; basic bytes free E460 .BY $20,$42,$41,$53,$49,$43 E466 .BY $20,$42,$59,$54,$45,$53 E46C .BY $20,$46,$52,$45,$45 E471 .BY $0D E472 .BY $00 ; **** commodore 64 basic v2 **** E473 .BY $93,$0D,$20,$20,$20 E478 .BY $20,$2A,$2A,$2A,$2A E47D .BY $20,$43,$4F,$4D,$4D,$4F,$44,$4F,$52,$45 E487 .BY $20,$36,$34 E48A .BY $20,$42,$41,$53,$49,$43 E490 .BY $20,$56,$32 E493 .BY $20,$2A,$2A,$2A,$2A E498 .BY $0D,$0D ; 64k ram system E49A .BY $20,$36,$34,$4B E49E .BY $20,$52,$41,$4D E4A2 .BY $20,$53,$59,$53,$54,$45,$4D E4A9 .BY $20,$20 E4AB .BY $00 E4AC .BY $81 ; set output device E4AD 48 PHA E4AE 20 C9 FF JSR $FFC9 E4B1 AA TAX E4B2 68 PLA E4B3 90 01 BCC $E4B6 E4B5 8A TXA E4B6 60 RTS ; unused E4B7 .BY $AA,$AA,$AA,$AA,$AA,$AA,$AA,$AA E4BF .BY $AA,$AA,$AA,$AA,$AA,$AA,$AA,$AA E4C7 .BY $AA,$AA,$AA,$AA,$AA,$AA,$AA,$AA E4CF .BY $AA,$AA,$AA,$AA E4D3 85 A9 STA $A9 E4D5 A9 01 LDA #$01 E4D7 85 AB STA $AB E4D9 60 RTS ; clear byte in color ram E4DA AD 86 02 LDA $0286 E4DD 91 F3 STA ($F3),Y E4DF 60 RTS ; pause after finding a file on casette E4E0 69 02 ADC #$02 E4E2 A4 91 LDY $91 E4E4 C8 INY E4E5 D0 04 BNE $E4EB E4E7 C5 A1 CMP $A1 E4E9 D0 F7 BNE $E4E2 E4EB 60 RTS ; baud rate factor table E4EC .WD $2619 ; 50 E4EE .WD $1944 ; 75 E4F0 .WD $111A ; 110 E4F2 .WD $0DE8 ; 134.5 E4F4 .WD $0C70 ; 150 E4F6 .WD $0606 ; 300 E4F8 .WD $02D1 ; 600 E4FA .WD $0137 ; 1200 E4FC .WD $00AE ; 1800 E4FE .WD $0069 ; 2400 ; read base address of I/O device into XY E500 A2 00 LDX #$00 ; low DC00 E502 A0 DC LDY #$DC ; high DC00 E504 60 RTS ; read screen size E505 A2 28 LDX #$28 ; 40 columns E507 A0 19 LDY #$19 ; 25 rows E509 60 RTS ; read/set XY cursor position E50A B0 07 BCS $E513 E50C 86 D6 STX $D6 E50E 84 D3 STY $D3 E510 20 6C E5 JSR $E56C E513 A6 D6 LDX $D6 E515 A4 D3 LDY $D3 E517 60 RTS ; initialise screen and keyboard E518 20 A0 E5 JSR $E5A0 E51B A9 00 LDA #$00 E51D 8D 91 02 STA $0291 E520 85 CF STA $CF E522 A9 48 LDA #$48 ; low EB48 E524 8D 8F 02 STA $028F E527 A9 EB LDA #$EB ; high EB48 E529 8D 90 02 STA $0290 E52C A9 0A LDA #$0A E52E 8D 89 02 STA $0289 E531 8D 8C 02 STA $028C E534 A9 0E LDA #$0E E536 8D 86 02 STA $0286 E539 A9 04 LDA #$04 E53B 8D 8B 02 STA $028B E53E A9 0C LDA #$0C E540 85 CD STA $CD E542 85 CC STA $CC E544 AD 88 02 LDA $0288 E547 09 80 ORA #$80 E549 A8 TAY E54A A9 00 LDA #$00 E54C AA TAX E54D 94 D9 STY $D9,X E54F 18 CLC E550 69 28 ADC #$28 E552 90 01 BCC $E555 E554 C8 INY E555 E8 INX E556 E0 1A CPX #$1A E558 D0 F3 BNE $E54D E55A A9 FF LDA #$FF E55C 95 D9 STA $D9,X E55E A2 18 LDX #$18 E560 20 FF E9 JSR $E9FF E563 CA DEX E564 10 FA BPL $E560 E566 A0 00 LDY #$00 E568 84 D3 STY $D3 E56A 84 D6 STY $D6 ; set address of curent screen line E56C A6 D6 LDX $D6 E56E A5 D3 LDA $D3 E570 B4 D9 LDY $D9,X E572 30 08 BMI $E57C E574 18 CLC E575 69 28 ADC #$28 E577 85 D3 STA $D3 E579 CA DEX E57A 10 F4 BPL $E570 E57C 20 F0 E9 JSR $E9F0 E57F A9 27 LDA #$27 E581 E8 INX E582 B4 D9 LDY $D9,X E584 30 06 BMI $E58C E586 18 CLC E587 69 28 ADC #$28 E589 E8 INX E58A 10 F6 BPL $E582 E58C 85 D5 STA $D5 E58E 4C 24 EA JMP $EA24 E591 E4 C9 CPX $C9 E593 F0 03 BEQ $E598 E595 4C ED E6 JMP $E6ED E598 60 RTS E599 EA NOP ; this code is unused by kernel ; since no other part of the ; rom jumps to this location! E59A 20 A0 E5 JSR $E5A0 E59D 4C 66 E5 JMP $E566 ; initialise vic chip E5A0 A9 03 LDA #$03 E5A2 85 9A STA $9A E5A4 A9 00 LDA #$00 E5A6 85 99 STA $99 E5A8 A2 2F LDX #$2F E5AA BD B8 EC LDA $ECB8,X E5AD 9D FF CF STA $CFFF,X E5B0 CA DEX E5B1 D0 F7 BNE $E5AA E5B3 60 RTS ; get character from keyboard buffer E5B4 AC 77 02 LDY $0277 E5B7 A2 00 LDX #$00 E5B9 BD 78 02 LDA $0278,X E5BC 9D 77 02 STA $0277,X E5BF E8 INX E5C0 E4 C6 CPX $C6 E5C2 D0 F5 BNE $E5B9 E5C4 C6 C6 DEC $C6 E5C6 98 TYA E5C7 58 CLI E5C8 18 CLC E5C9 60 RTS ; wait for return for keyboard E5CA 20 16 E7 JSR $E716 E5CD A5 C6 LDA $C6 E5CF 85 CC STA $CC E5D1 8D 92 02 STA $0292 E5D4 F0 F7 BEQ $E5CD E5D6 78 SEI E5D7 A5 CF LDA $CF E5D9 F0 0C BEQ $E5E7 E5DB A5 CE LDA $CE E5DD AE 87 02 LDX $0287 E5E0 A0 00 LDY #$00 E5E2 84 CF STY $CF E5E4 20 13 EA JSR $EA13 E5E7 20 B4 E5 JSR $E5B4 E5EA C9 83 CMP #$83 E5EC D0 10 BNE $E5FE E5EE A2 09 LDX #$09 E5F0 78 SEI E5F1 86 C6 STX $C6 E5F3 BD E6 EC LDA $ECE6,X E5F6 9D 76 02 STA $0276,X E5F9 CA DEX E5FA D0 F7 BNE $E5F3 E5FC F0 CF BEQ $E5CD E5FE C9 0D CMP #$0D E600 D0 C8 BNE $E5CA E602 A4 D5 LDY $D5 E604 84 D0 STY $D0 E606 B1 D1 LDA ($D1),Y E608 C9 20 CMP #$20 E60A D0 03 BNE $E60F E60C 88 DEY E60D D0 F7 BNE $E606 E60F C8 INY E610 84 C8 STY $C8 E612 A0 00 LDY #$00 E614 8C 92 02 STY $0292 E617 84 D3 STY $D3 E619 84 D4 STY $D4 E61B A5 C9 LDA $C9 E61D 30 1B BMI $E63A E61F A6 D6 LDX $D6 E621 20 91 E5 JSR $E591 E624 E4 C9 CPX $C9 E626 D0 12 BNE $E63A E628 A5 CA LDA $CA E62A 85 D3 STA $D3 E62C C5 C8 CMP $C8 E62E 90 0A BCC $E63A E630 B0 2B BCS $E65D ; get character from device 0 or 3 E632 98 TYA E633 48 PHA E634 8A TXA E635 48 PHA E636 A5 D0 LDA $D0 E638 F0 93 BEQ $E5CD ; get character from current screen line E63A A4 D3 LDY $D3 E63C B1 D1 LDA ($D1),Y E63E 85 D7 STA $D7 E640 29 3F AND #$3F E642 06 D7 ASL $D7 E644 24 D7 BIT $D7 E646 10 02 BPL $E64A E648 09 80 ORA #$80 E64A 90 04 BCC $E650 E64C A6 D4 LDX $D4 E64E D0 04 BNE $E654 E650 70 02 BVS $E654 E652 09 40 ORA #$40 E654 E6 D3 INC $D3 E656 20 84 E6 JSR $E684 E659 C4 C8 CPY $C8 E65B D0 17 BNE $E674 E65D A9 00 LDA #$00 E65F 85 D0 STA $D0 E661 A9 0D LDA #$0D E663 A6 99 LDX $99 E665 E0 03 CPX #$03 E667 F0 06 BEQ $E66F E669 A6 9A LDX $9A E66B E0 03 CPX #$03 E66D F0 03 BEQ $E672 E66F 20 16 E7 JSR $E716 E672 A9 0D LDA #$0D E674 85 D7 STA $D7 E676 68 PLA E677 AA TAX E678 68 PLA E679 A8 TAY E67A A5 D7 LDA $D7 E67C C9 DE CMP #$DE ; screen PI code E67E D0 02 BNE $E682 E680 A9 FF LDA #$FF ; petscii PI code E682 18 CLC E683 60 RTS ; check for quote mark and set flag E684 C9 22 CMP #$22 ; quote mark E686 D0 08 BNE $E690 E688 A5 D4 LDA $D4 E68A 49 01 EOR #$01 E68C 85 D4 STA $D4 E68E A9 22 LDA #$22 ; quote mark E690 60 RTS ; fill screen at current position E691 09 40 ORA #$40 E693 A6 C7 LDX $C7 E695 F0 02 BEQ $E699 E697 09 80 ORA #$80 E699 A6 D8 LDX $D8 E69B F0 02 BEQ $E69F E69D C6 D8 DEC $D8 E69F AE 86 02 LDX $0286 E6A2 20 13 EA JSR $EA13 E6A5 20 B6 E6 JSR $E6B6 ; return from output to the screen E6A8 68 PLA E6A9 A8 TAY E6AA A5 D8 LDA $D8 E6AC F0 02 BEQ $E6B0 E6AE 46 D4 LSR $D4 E6B0 68 PLA E6B1 AA TAX E6B2 68 PLA E6B3 18 CLC E6B4 58 CLI E6B5 60 RTS ; get/insert new line E6B6 20 B3 E8 JSR $E8B3 E6B9 E6 D3 INC $D3 E6BB A5 D5 LDA $D5 E6BD C5 D3 CMP $D3 E6BF B0 3F BCS $E700 E6C1 C9 4F CMP #$4F E6C3 F0 32 BEQ $E6F7 E6C5 AD 92 02 LDA $0292 E6C8 F0 03 BEQ $E6CD E6CA 4C 67 E9 JMP $E967 E6CD A6 D6 LDX $D6 E6CF E0 19 CPX #$19 E6D1 90 07 BCC $E6DA E6D3 20 EA E8 JSR $E8EA E6D6 C6 D6 DEC $D6 E6D8 A6 D6 LDX $D6 E6DA 16 D9 ASL $D9,X E6DC 56 D9 LSR $D9,X E6DE E8 INX E6DF B5 D9 LDA $D9,X E6E1 09 80 ORA #$80 E6E3 95 D9 STA $D9,X E6E5 CA DEX E6E6 A5 D5 LDA $D5 E6E8 18 CLC E6E9 69 28 ADC #$28 E6EB 85 D5 STA $D5 E6ED B5 D9 LDA $D9,X E6EF 30 03 BMI $E6F4 E6F1 CA DEX E6F2 D0 F9 BNE $E6ED E6F4 4C F0 E9 JMP $E9F0 E6F7 C6 D6 DEC $D6 E6F9 20 7C E8 JSR $E87C E6FC A9 00 LDA #$00 E6FE 85 D3 STA $D3 E700 60 RTS ; move backwards over a line boundary E701 A6 D6 LDX $D6 E703 D0 06 BNE $E70B E705 86 D3 STX $D3 E707 68 PLA E708 68 PLA E709 D0 9D BNE $E6A8 E70B CA DEX E70C 86 D6 STX $D6 E70E 20 6C E5 JSR $E56C E711 A4 D5 LDY $D5 E713 84 D3 STY $D3 E715 60 RTS ; put a character to screen E716 48 PHA E717 85 D7 STA $D7 E719 8A TXA E71A 48 PHA E71B 98 TYA E71C 48 PHA E71D A9 00 LDA #$00 E71F 85 D0 STA $D0 E721 A4 D3 LDY $D3 E723 A5 D7 LDA $D7 E725 10 03 BPL $E72A E727 4C D4 E7 JMP $E7D4 E72A C9 0D CMP #$0D ; return code E72C D0 03 BNE $E731 E72E 4C 91 E8 JMP $E891 E731 C9 20 CMP #$20 E733 90 10 BCC $E745 E735 C9 60 CMP #$60 E737 90 04 BCC $E73D E739 29 DF AND #$DF E73B D0 02 BNE $E73F E73D 29 3F AND #$3F E73F 20 84 E6 JSR $E684 E742 4C 93 E6 JMP $E693 E745 A6 D8 LDX $D8 E747 F0 03 BEQ $E74C E749 4C 97 E6 JMP $E697 E74C C9 14 CMP #$14 ; delete code E74E D0 2E BNE $E77E E750 98 TYA E751 D0 06 BNE $E759 E753 20 01 E7 JSR $E701 E756 4C 73 E7 JMP $E773 E759 20 A1 E8 JSR $E8A1 E75C 88 DEY E75D 84 D3 STY $D3 E75F 20 24 EA JSR $EA24 E762 C8 INY E763 B1 D1 LDA ($D1),Y E765 88 DEY E766 91 D1 STA ($D1),Y E768 C8 INY E769 B1 F3 LDA ($F3),Y E76B 88 DEY E76C 91 F3 STA ($F3),Y E76E C8 INY E76F C4 D5 CPY $D5 E771 D0 EF BNE $E762 E773 A9 20 LDA #$20 ; space E775 91 D1 STA ($D1),Y E777 AD 86 02 LDA $0286 E77A 91 F3 STA ($F3),Y E77C 10 4D BPL $E7CB E77E A6 D4 LDX $D4 E780 F0 03 BEQ $E785 E782 4C 97 E6 JMP $E697 E785 C9 12 CMP #$12 ; reverse code E787 D0 02 BNE $E78B E789 85 C7 STA $C7 E78B C9 13 CMP #$13 ; home code E78D D0 03 BNE $E792 E78F 20 66 E5 JSR $E566 E792 C9 1D CMP #$1D ; csr right E794 D0 17 BNE $E7AD E796 C8 INY E797 20 B3 E8 JSR $E8B3 E79A 84 D3 STY $D3 E79C 88 DEY E79D C4 D5 CPY $D5 E79F 90 09 BCC $E7AA E7A1 C6 D6 DEC $D6 E7A3 20 7C E8 JSR $E87C E7A6 A0 00 LDY #$00 E7A8 84 D3 STY $D3 E7AA 4C A8 E6 JMP $E6A8 E7AD C9 11 CMP #$11 ; csr down E7AF D0 1D BNE $E7CE E7B1 18 CLC E7B2 98 TYA E7B3 69 28 ADC #$28 E7B5 A8 TAY E7B6 E6 D6 INC $D6 E7B8 C5 D5 CMP $D5 E7BA 90 EC BCC $E7A8 E7BC F0 EA BEQ $E7A8 E7BE C6 D6 DEC $D6 E7C0 E9 28 SBC #$28 E7C2 90 04 BCC $E7C8 E7C4 85 D3 STA $D3 E7C6 D0 F8 BNE $E7C0 E7C8 20 7C E8 JSR $E87C E7CB 4C A8 E6 JMP $E6A8 E7CE 20 CB E8 JSR $E8CB E7D1 4C 44 EC JMP $EC44 ; put shifted chars to screen E7D4 29 7F AND #$7F ; remove shift bit E7D6 C9 7F CMP #$7F ; code for PI E7D8 D0 02 BNE $E7DC E7DA A9 5E LDA #$5E ; screen PI E7DC C9 20 CMP #$20 E7DE 90 03 BCC $E7E3 E7E0 4C 91 E6 JMP $E691 E7E3 C9 0D CMP #$0D ; shift return E7E5 D0 03 BNE $E7EA E7E7 4C 91 E8 JMP $E891 E7EA A6 D4 LDX $D4 E7EC D0 3F BNE $E82D E7EE C9 14 CMP #$14 ; insert E7F0 D0 37 BNE $E829 E7F2 A4 D5 LDY $D5 E7F4 B1 D1 LDA ($D1),Y E7F6 C9 20 CMP #$20 E7F8 D0 04 BNE $E7FE E7FA C4 D3 CPY $D3 E7FC D0 07 BNE $E805 E7FE C0 4F CPY #$4F E800 F0 24 BEQ $E826 E802 20 65 E9 JSR $E965 E805 A4 D5 LDY $D5 E807 20 24 EA JSR $EA24 E80A 88 DEY E80B B1 D1 LDA ($D1),Y E80D C8 INY E80E 91 D1 STA ($D1),Y E810 88 DEY E811 B1 F3 LDA ($F3),Y E813 C8 INY E814 91 F3 STA ($F3),Y E816 88 DEY E817 C4 D3 CPY $D3 E819 D0 EF BNE $E80A E81B A9 20 LDA #$20 E81D 91 D1 STA ($D1),Y E81F AD 86 02 LDA $0286 E822 91 F3 STA ($F3),Y E824 E6 D8 INC $D8 E826 4C A8 E6 JMP $E6A8 E829 A6 D8 LDX $D8 E82B F0 05 BEQ $E832 E82D 09 40 ORA #$40 E82F 4C 97 E6 JMP $E697 E832 C9 11 CMP #$11 ; csr up E834 D0 16 BNE $E84C E836 A6 D6 LDX $D6 E838 F0 37 BEQ $E871 E83A C6 D6 DEC $D6 E83C A5 D3 LDA $D3 E83E 38 SEC E83F E9 28 SBC #$28 E841 90 04 BCC $E847 E843 85 D3 STA $D3 E845 10 2A BPL $E871 E847 20 6C E5 JSR $E56C E84A D0 25 BNE $E871 E84C C9 12 CMP #$12 ; reverse off E84E D0 04 BNE $E854 E850 A9 00 LDA #$00 E852 85 C7 STA $C7 E854 C9 1D CMP #$1D ; csr left E856 D0 12 BNE $E86A E858 98 TYA E859 F0 09 BEQ $E864 E85B 20 A1 E8 JSR $E8A1 E85E 88 DEY E85F 84 D3 STY $D3 E861 4C A8 E6 JMP $E6A8 E864 20 01 E7 JSR $E701 E867 4C A8 E6 JMP $E6A8 E86A C9 13 CMP #$13 ; clr code E86C D0 06 BNE $E874 E86E 20 44 E5 JSR $E544 E871 4C A8 E6 JMP $E6A8 E874 09 80 ORA #$80 E876 20 CB E8 JSR $E8CB E879 4C 4F EC JMP $EC4F ; set next line number E87C 46 C9 LSR $C9 E87E A6 D6 LDX $D6 E880 E8 INX E881 E0 19 CPX #$19 E883 D0 03 BNE $E888 E885 20 EA E8 JSR $E8EA E888 B5 D9 LDA $D9,X E88A 10 F4 BPL $E880 E88C 86 D6 STX $D6 E88E 4C 6C E5 JMP $E56C ; action for return E891 A2 00 LDX #$00 E893 86 D8 STX $D8 E895 86 C7 STX $C7 E897 86 D4 STX $D4 E899 86 D3 STX $D3 E89B 20 7C E8 JSR $E87C E89E 4C A8 E6 JMP $E6A8 ; move cursor to previous line if ; at start of line E8A1 A2 02 LDX #$02 E8A3 A9 00 LDA #$00 E8A5 C5 D3 CMP $D3 E8A7 F0 07 BEQ $E8B0 E8A9 18 CLC E8AA 69 28 ADC #$28 E8AC CA DEX E8AD D0 F6 BNE $E8A5 E8AF 60 RTS E8B0 C6 D6 DEC $D6 E8B2 60 RTS ; move cursor to next line if ; at end of line E8B3 A2 02 LDX #$02 E8B5 A9 27 LDA #$27 E8B7 C5 D3 CMP $D3 E8B9 F0 07 BEQ $E8C2 E8BB 18 CLC E8BC 69 28 ADC #$28 E8BE CA DEX E8BF D0 F6 BNE $E8B7 E8C1 60 RTS E8C2 A6 D6 LDX $D6 E8C4 E0 19 CPX #$19 E8C6 F0 02 BEQ $E8CA E8C8 E6 D6 INC $D6 E8CA 60 RTS ; check for colour change codes E8CB A2 0F LDX #$0F E8CD DD DA E8 CMP $E8DA,X E8D0 F0 04 BEQ $E8D6 E8D2 CA DEX E8D3 10 F8 BPL $E8CD E8D5 60 RTS E8D6 8E 86 02 STX $0286 E8D9 60 RTS ; colour key codes E8DA .BY $90,$05,$1C,$9F,$9C,$1E,$1F,$9E E8E2 .BY $81,$95,$96,$97,$98,$99,$9A,$9B ; scroll screen E8EA A5 AC LDA $AC E8EC 48 PHA E8ED A5 AD LDA $AD E8EF 48 PHA E8F0 A5 AE LDA $AE E8F2 48 PHA E8F3 A5 AF LDA $AF E8F5 48 PHA E8F6 A2 FF LDX #$FF E8F8 C6 D6 DEC $D6 E8FA C6 C9 DEC $C9 E8FC CE A5 02 DEC $02A5 E8FF E8 INX E900 20 F0 E9 JSR $E9F0 E903 E0 18 CPX #$18 E905 B0 0C BCS $E913 E907 BD F1 EC LDA $ECF1,X E90A 85 AC STA $AC E90C B5 DA LDA $DA,X E90E 20 C8 E9 JSR $E9C8 E911 30 EC BMI $E8FF E913 20 FF E9 JSR $E9FF E916 A2 00 LDX #$00 E918 B5 D9 LDA $D9,X E91A 29 7F AND #$7F E91C B4 DA LDY $DA,X E91E 10 02 BPL $E922 E920 09 80 ORA #$80 E922 95 D9 STA $D9,X E924 E8 INX E925 E0 18 CPX #$18 E927 D0 EF BNE $E918 E929 A5 F1 LDA $F1 E92B 09 80 ORA #$80 E92D 85 F1 STA $F1 E92F A5 D9 LDA $D9 E931 10 C3 BPL $E8F6 E933 E6 D6 INC $D6 E935 EE A5 02 INC $02A5 E938 A9 7F LDA #$7F E93A 8D 00 DC STA $DC00 E93D AD 01 DC LDA $DC01 E940 C9 FB CMP #$FB E942 08 PHP E943 A9 7F LDA #$7F E945 8D 00 DC STA $DC00 E948 28 PLP E949 D0 0B BNE $E956 E94B A0 00 LDY #$00 E94D EA NOP E94E CA DEX E94F D0 FC BNE $E94D E951 88 DEY E952 D0 F9 BNE $E94D E954 84 C6 STY $C6 E956 A6 D6 LDX $D6 E958 68 PLA E959 85 AF STA $AF E95B 68 PLA E95C 85 AE STA $AE E95E 68 PLA E95F 85 AD STA $AD E961 68 PLA E962 85 AC STA $AC E964 60 RTS ; insert blank line in screen E965 A6 D6 LDX $D6 E967 E8 INX E968 B5 D9 LDA $D9,X E96A 10 FB BPL $E967 E96C 8E A5 02 STX $02A5 E96F E0 18 CPX #$18 E971 F0 0E BEQ $E981 E973 90 0C BCC $E981 E975 20 EA E8 JSR $E8EA E978 AE A5 02 LDX $02A5 E97B CA DEX E97C C6 D6 DEC $D6 E97E 4C DA E6 JMP $E6DA E981 A5 AC LDA $AC E983 48 PHA E984 A5 AD LDA $AD E986 48 PHA E987 A5 AE LDA $AE E989 48 PHA E98A A5 AF LDA $AF E98C 48 PHA E98D A2 19 LDX #$19 E98F CA DEX E990 20 F0 E9 JSR $E9F0 E993 EC A5 02 CPX $02A5 E996 90 0E BCC $E9A6 E998 F0 0C BEQ $E9A6 E99A BD EF EC LDA $ECEF,X E99D 85 AC STA $AC E99F B5 D8 LDA $D8,X E9A1 20 C8 E9 JSR $E9C8 E9A4 30 E9 BMI $E98F E9A6 20 FF E9 JSR $E9FF E9A9 A2 17 LDX #$17 E9AB EC A5 02 CPX $02A5 E9AE 90 0F BCC $E9BF E9B0 B5 DA LDA $DA,X E9B2 29 7F AND #$7F E9B4 B4 D9 LDY $D9,X E9B6 10 02 BPL $E9BA E9B8 09 80 ORA #$80 E9BA 95 DA STA $DA,X E9BC CA DEX E9BD D0 EC BNE $E9AB E9BF AE A5 02 LDX $02A5 E9C2 20 DA E6 JSR $E6DA E9C5 4C 58 E9 JMP $E958 ; move one screen line E9C8 29 03 AND #$03 E9CA 0D 88 02 ORA $0288 E9CD 85 AD STA $AD E9CF 20 E0 E9 JSR $E9E0 E9D2 A0 27 LDY #$27 E9D4 B1 AC LDA ($AC),Y E9D6 91 D1 STA ($D1),Y E9D8 B1 AE LDA ($AE),Y E9DA 91 F3 STA ($F3),Y E9DC 88 DEY E9DD 10 F5 BPL $E9D4 E9DF 60 RTS ; set colour and screen addresses E9E0 20 24 EA JSR $EA24 E9E3 A5 AC LDA $AC E9E5 85 AE STA $AE E9E7 A5 AD LDA $AD E9E9 29 03 AND #$03 E9EB 09 D8 ORA #$D8 E9ED 85 AF STA $AF E9EF 60 RTS ; fetch screen addresses E9F0 BD F0 EC LDA $ECF0,X E9F3 85 D1 STA $D1 E9F5 B5 D9 LDA $D9,X E9F7 29 03 AND #$03 E9F9 0D 88 02 ORA $0288 E9FC 85 D2 STA $D2 E9FE 60 RTS ; clear one screen line E9FF A0 27 LDY #$27 EA01 20 F0 E9 JSR $E9F0 EA04 20 24 EA JSR $EA24 EA07 20 DA E4 JSR $E4DA EA0A A9 20 LDA #$20 EA0C 91 D1 STA ($D1),Y EA0E 88 DEY EA0F 10 F6 BPL $EA07 EA11 60 RTS EA12 EA NOP ; set cursor flash timing and colour memory addresses EA13 A8 TAY EA14 A9 02 LDA #$02 EA16 85 CD STA $CD EA18 20 24 EA JSR $EA24 EA1B 98 TYA ; put a char on the screen EA1C A4 D3 LDY $D3 EA1E 91 D1 STA ($D1),Y EA20 8A TXA EA21 91 F3 STA ($F3),Y EA23 60 RTS ; set colour memory adress parallel to screen EA24 A5 D1 LDA $D1 EA26 85 F3 STA $F3 EA28 A5 D2 LDA $D2 EA2A 29 03 AND #$03 EA2C 09 D8 ORA #$D8 EA2E 85 F4 STA $F4 EA30 60 RTS ; normal IRQ interrupt EA31 20 EA FF JSR $FFEA ; do clock EA34 A5 CC LDA $CC ; flash cursor EA36 D0 29 BNE $EA61 EA38 C6 CD DEC $CD EA3A D0 25 BNE $EA61 EA3C A9 14 LDA #$14 EA3E 85 CD STA $CD EA40 A4 D3 LDY $D3 EA42 46 CF LSR $CF EA44 AE 87 02 LDX $0287 EA47 B1 D1 LDA ($D1),Y EA49 B0 11 BCS $EA5C EA4B E6 CF INC $CF EA4D 85 CE STA $CE EA4F 20 24 EA JSR $EA24 EA52 B1 F3 LDA ($F3),Y EA54 8D 87 02 STA $0287 EA57 AE 86 02 LDX $0286 EA5A A5 CE LDA $CE EA5C 49 80 EOR #$80 EA5E 20 1C EA JSR $EA1C ; display cursor EA61 A5 01 LDA $01 ; checl cassette sense EA63 29 10 AND #$10 EA65 F0 0A BEQ $EA71 EA67 A0 00 LDY #$00 EA69 84 C0 STY $C0 EA6B A5 01 LDA $01 EA6D 09 20 ORA #$20 EA6F D0 08 BNE $EA79 EA71 A5 C0 LDA $C0 EA73 D0 06 BNE $EA7B EA75 A5 01 LDA $01 EA77 29 1F AND #$1F EA79 85 01 STA $01 EA7B 20 87 EA JSR $EA87 ; scan keyboard EA7E AD 0D DC LDA $DC0D EA81 68 PLA EA82 A8 TAY EA83 68 PLA EA84 AA TAX EA85 68 PLA EA86 40 RTI ; scan keyboard EA87 A9 00 LDA #$00 EA89 8D 8D 02 STA $028D EA8C A0 40 LDY #$40 EA8E 84 CB STY $CB EA90 8D 00 DC STA $DC00 EA93 AE 01 DC LDX $DC01 EA96 E0 FF CPX #$FF EA98 F0 61 BEQ $EAFB EA9A A8 TAY EA9B A9 81 LDA #$81 EA9D 85 F5 STA $F5 EA9F A9 EB LDA #$EB EAA1 85 F6 STA $F6 EAA3 A9 FE LDA #$FE EAA5 8D 00 DC STA $DC00 EAA8 A2 08 LDX #$08 EAAA 48 PHA EAAB AD 01 DC LDA $DC01 EAAE CD 01 DC CMP $DC01 EAB1 D0 F8 BNE $EAAB EAB3 4A LSR EAB4 B0 16 BCS $EACC EAB6 48 PHA EAB7 B1 F5 LDA ($F5),Y EAB9 C9 05 CMP #$05 EABB B0 0C BCS $EAC9 EABD C9 03 CMP #$03 EABF F0 08 BEQ $EAC9 EAC1 0D 8D 02 ORA $028D EAC4 8D 8D 02 STA $028D EAC7 10 02 BPL $EACB EAC9 84 CB STY $CB EACB 68 PLA EACC C8 INY EACD C0 41 CPY #$41 EACF B0 0B BCS $EADC EAD1 CA DEX EAD2 D0 DF BNE $EAB3 EAD4 38 SEC EAD5 68 PLA EAD6 2A ROL EAD7 8D 00 DC STA $DC00 EADA D0 CC BNE $EAA8 EADC 68 PLA EADD 6C 8F 02 JMP ($028F) EAE0 A4 CB LDY $CB EAE2 B1 F5 LDA ($F5),Y EAE4 AA TAX EAE5 C4 C5 CPY $C5 EAE7 F0 07 BEQ $EAF0 EAE9 A0 10 LDY #$10 EAEB 8C 8C 02 STY $028C EAEE D0 36 BNE $EB26 EAF0 29 7F AND #$7F EAF2 2C 8A 02 BIT $028A EAF5 30 16 BMI $EB0D EAF7 70 49 BVS $EB42 EAF9 C9 7F CMP #$7F EAFB F0 29 BEQ $EB26 EAFD C9 14 CMP #$14 ; delete EAFF F0 0C BEQ $EB0D EB01 C9 20 CMP #$20 ; space EB03 F0 08 BEQ $EB0D EB05 C9 1D CMP #$1D ; csr right/left EB07 F0 04 BEQ $EB0D EB09 C9 11 CMP #$11 ; csr up/down EB0B D0 35 BNE $EB42 EB0D AC 8C 02 LDY $028C EB10 F0 05 BEQ $EB17 EB12 CE 8C 02 DEC $028C EB15 D0 2B BNE $EB42 EB17 CE 8B 02 DEC $028B EB1A D0 26 BNE $EB42 EB1C A0 04 LDY #$04 EB1E 8C 8B 02 STY $028B EB21 A4 C6 LDY $C6 EB23 88 DEY EB24 10 1C BPL $EB42 EB26 A4 CB LDY $CB EB28 84 C5 STY $C5 EB2A AC 8D 02 LDY $028D EB2D 8C 8E 02 STY $028E EB30 E0 FF CPX #$FF EB32 F0 0E BEQ $EB42 EB34 8A TXA EB35 A6 C6 LDX $C6 EB37 EC 89 02 CPX $0289 EB3A B0 06 BCS $EB42 EB3C 9D 77 02 STA $0277,X EB3F E8 INX EB40 86 C6 STX $C6 EB42 A9 7F LDA #$7F EB44 8D 00 DC STA $DC00 EB47 60 RTS EB48 AD 8D 02 LDA $028D EB4B C9 03 CMP #$03 EB4D D0 15 BNE $EB64 EB4F CD 8E 02 CMP $028E EB52 F0 EE BEQ $EB42 EB54 AD 91 02 LDA $0291 EB57 30 1D BMI $EB76 EB59 AD 18 D0 LDA $D018 EB5C 49 02 EOR #$02 EB5E 8D 18 D0 STA $D018 EB61 4C 76 EB JMP $EB76 ; select keyboard table EB64 0A ASL EB65 C9 08 CMP #$08 EB67 90 02 BCC $EB6B EB69 A9 06 LDA #$06 EB6B AA TAX EB6C BD 79 EB LDA $EB79,X EB6F 85 F5 STA $F5 EB71 BD 7A EB LDA $EB7A,X EB74 85 F6 STA $F6 EB76 4C E0 EA JMP $EAE0 ; table addresses EB79 .WD $EB81 ; standard EB7B .WD $EBC2 ; shift EB7D .WD $EC03 ; commodore key EB7F .WD $EC78 ; control ; standard keyboard table EB81 .BY $14,$0D,$1D,$88,$85,$86,$87,$11 EB89 .BY $33,$57,$41,$34,$5A,$53,$45,$01 EB91 .BY $35,$52,$44,$36,$43,$46,$54,$58 EB99 .BY $37,$59,$47,$38,$42,$48,$55,$56 EBA1 .BY $39,$49,$4A,$30,$4D,$4B,$4F,$4E EBA9 .BY $2B,$50,$4C,$2D,$2E,$3A,$40,$2C EBB1 .BY $5C,$2A,$3B,$13,$01,$3D,$5E,$2F EBB9 .BY $31,$5F,$04,$32,$20,$02,$51,$03 EBC1 .BY $FF ; shift keyboard table EBC2 .BY $94,$8D,$9D,$8C,$89,$8A,$8B,$91 EBCA .BY $23,$D7,$C1,$24,$DA,$D3,$C5,$01 EBD2 .BY $25,$D2,$C4,$26,$C3,$C6,$D4,$D8 EBDA .BY $27,$D9,$C7,$28,$C2,$C8,$D5,$D6 EBE2 .BY $29,$C9,$CA,$30,$CD,$CB,$CF,$CE EBEA .BY $DB,$D0,$CC,$DD,$3E,$5B,$BA,$3C EBF2 .BY $A9,$C0,$5D,$93,$01,$3D,$DE,$3F EBFA .BY $21,$5F,$04,$22,$A0,$02,$D1,$83 EC02 .BY $FF ; commodore key keyboard table EC03 .BY $94,$8D,$9D,$8C,$89,$8A,$8B,$91 EC0B .BY $96,$B3,$B0,$97,$AD,$AE,$B1,$01 EC13 .BY $98,$B2,$AC,$99,$BC,$BB,$A3,$BD EC1B .BY $9A,$B7,$A5,$9B,$BF,$B4,$B8,$BE EC23 .BY $29,$A2,$B5,$30,$A7,$A1,$B9,$AA EC2B .BY $A6,$AF,$B6,$DC,$3E,$5B,$A4,$3C EC33 .BY $A8,$DF,$5D,$93,$01,$3D,$DE,$3F EC3B .BY $81,$5F,$04,$95,$A0,$02,$AB,$83 EC43 .BY $FF ; check for special petscii codes EC44 C9 0E CMP #$0E EC46 D0 07 BNE $EC4F EC48 AD 18 D0 LDA $D018 EC4B 09 02 ORA #$02 EC4D D0 09 BNE $EC58 EC4F C9 8E CMP #$8E EC51 D0 0B BNE $EC5E EC53 AD 18 D0 LDA $D018 EC56 29 FD AND #$FD EC58 8D 18 D0 STA $D018 EC5B 4C A8 E6 JMP $E6A8 ; shift + commodore key check EC5E C9 08 CMP #$08 EC60 D0 07 BNE $EC69 EC62 A9 80 LDA #$80 EC64 0D 91 02 ORA $0291 EC67 30 09 BMI $EC72 EC69 C9 09 CMP #$09 EC6B D0 EE BNE $EC5B EC6D A9 7F LDA #$7F EC6F 2D 91 02 AND $0291 EC72 8D 91 02 STA $0291 EC75 4C A8 E6 JMP $E6A8 ; control keyboard table EC78 .BY $FF,$FF,$FF,$FF,$FF,$FF,$FF,$FF EC80 .BY $1C,$17,$01,$9F,$1A,$13,$05,$FF EC88 .BY $9C,$12,$04,$1E,$03,$06,$14,$18 EC90 .BY $1F,$19,$07,$9E,$02,$08,$15,$16 EC98 .BY $12,$09,$0A,$92,$0D,$0B,$0F,$0E ECA0 .BY $FF,$10,$0C,$FF,$FF,$1B,$00,$FF ECA8 .BY $1C,$FF,$1D,$FF,$FF,$1F,$1E,$FF ECB0 .BY $90,$06,$FF,$05,$FF,$FF,$11,$FF ECB8 .BY $FF ; default values for VIC chip ECB9 .BY $00,$00 ; sprite 1 x,y ECBB .BY $00,$00 ; sprite 2 x,y ECBD .BY $00,$00 ; sprite 3 x,y ECBF .BY $00,$00 ; sprite 4 x,y ECC1 .BY $00,$00 ; sprite 5 x,y ECC3 .BY $00,$00 ; sprite 6 x,y ECC5 .BY $00,$00 ; sprite 7 x,y ECC7 .BY $00,$00 ; sprite 8 x,y ECC9 .BY $00 ECCA .BY $9B ECCB .BY $37 ECCC .BY $00 ECCD .BY $00 ECCE .BY $00 ECCF .BY $08 ECD0 .BY $00 ; sprite Y expand ECD1 .BY $14 ECD2 .BY $0F ECD3 .BY $00 ECD4 .BY $00 ECD5 .BY $00 ; sprite multi-colour ECD6 .BY $00 ; sprite X expand ECD7 .BY $00 ECD8 .BY $00 ECD9 .BY $0E ; boarder colour ECDA .BY $06 ; background colour ECDB .BY $01 ECDC .BY $02 ECDD .BY $03 ECDE .BY $04 ECDF .BY $00 ; sprite colour ECE0 .BY $01 ; sprite colour ECE1 .BY $02 ; sprite colour ECE2 .BY $03 ; sprite colour ECE3 .BY $04 ; sprite colour ECE4 .BY $05 ; sprite colour ECE5 .BY $06 ; sprite colour ECE6 .BY $07 ; sprite colour ; load ECE7 .BY $4C,$4F,$41,$44,$0D ; run ECEC .BY $52,$55,$4E,$0D ; low bytes of screen line addresses ECF0 .BY $00,$28,$50,$78,$A0 ECF5 .BY $C8,$F0,$18,$40,$68 ECFA .BY $90,$B8,$E0,$08,$30 ECFF .BY $58,$80,$A8,$D0,$F8 ED04 .BY $20,$48,$70,$98,$C0 ; send talk on serial bus ED09 09 40 ORA #$40 ED0B .BY $2C ; send listen on serial bus ED0C 09 20 ORA #$20 ED0E 20 A4 F0 JSR $F0A4 ED11 48 PHA ED12 24 94 BIT $94 ED14 10 0A BPL $ED20 ED16 38 SEC ED17 66 A3 ROR $A3 ED19 20 40 ED JSR $ED40 ED1C 46 94 LSR $94 ED1E 46 A3 LSR $A3 ED20 68 PLA ED21 85 95 STA $95 ED23 78 SEI ED24 20 97 EE JSR $EE97 ED27 C9 3F CMP #$3F ED29 D0 03 BNE $ED2E ED2B 20 85 EE JSR $EE85 ED2E AD 00 DD LDA $DD00 ED31 09 08 ORA #$08 ED33 8D 00 DD STA $DD00 ED36 78 SEI ED37 20 8E EE JSR $EE8E ED3A 20 97 EE JSR $EE97 ED3D 20 B3 EE JSR $EEB3 ; send byte from $95 on serial bus ED40 78 SEI ED41 20 97 EE JSR $EE97 ED44 20 A9 EE JSR $EEA9 ED47 B0 64 BCS $EDAD ED49 20 85 EE JSR $EE85 ED4C 24 A3 BIT $A3 ED4E 10 0A BPL $ED5A ED50 20 A9 EE JSR $EEA9 ED53 90 FB BCC $ED50 ED55 20 A9 EE JSR $EEA9 ED58 B0 FB BCS $ED55 ED5A 20 A9 EE JSR $EEA9 ED5D 90 FB BCC $ED5A ED5F 20 8E EE JSR $EE8E ED62 A9 08 LDA #$08 ED64 85 A5 STA $A5 ED66 AD 00 DD LDA $DD00 ED69 CD 00 DD CMP $DD00 ED6C D0 F8 BNE $ED66 ED6E 0A ASL ED6F 90 3F BCC $EDB0 ED71 66 95 ROR $95 ED73 B0 05 BCS $ED7A ED75 20 A0 EE JSR $EEA0 ED78 D0 03 BNE $ED7D ED7A 20 97 EE JSR $EE97 ED7D 20 85 EE JSR $EE85 ED80 EA NOP ED81 EA NOP ED82 EA NOP ED83 EA NOP ED84 AD 00 DD LDA $DD00 ED87 29 DF AND #$DF ED89 09 10 ORA #$10 ED8B 8D 00 DD STA $DD00 ED8E C6 A5 DEC $A5 ED90 D0 D4 BNE $ED66 ED92 A9 04 LDA #$04 ED94 8D 07 DC STA $DC07 ED97 A9 19 LDA #$19 ED99 8D 0F DC STA $DC0F ED9C AD 0D DC LDA $DC0D ED9F AD 0D DC LDA $DC0D EDA2 29 02 AND #$02 EDA4 D0 0A BNE $EDB0 EDA6 20 A9 EE JSR $EEA9 EDA9 B0 F4 BCS $ED9F EDAB 58 CLI EDAC 60 RTS EDAD A9 80 LDA #$80 EDAF .BY $2C EDB0 A9 03 LDA #$03 EDB2 20 1C FE JSR $FE1C EDB5 58 CLI EDB6 18 CLC EDB7 90 4A BCC $EE03 ; send secondary address (listen) on serial bus EDB9 85 95 STA $95 EDBB 20 36 ED JSR $ED36 EDBE AD 00 DD LDA $DD00 EDC1 29 F7 AND #$F7 EDC3 8D 00 DD STA $DD00 EDC6 60 RTS ; send secondary address (talk) on serial bus EDC7 85 95 STA $95 EDC9 20 36 ED JSR $ED36 EDCC 78 SEI EDCD 20 A0 EE JSR $EEA0 EDD0 20 BE ED JSR $EDBE EDD3 20 85 EE JSR $EE85 EDD6 20 A9 EE JSR $EEA9 EDD9 30 FB BMI $EDD6 EDDB 58 CLI EDDC 60 RTS ; output byte on serial bus EDDD 24 94 BIT $94 EDDF 30 05 BMI $EDE6 EDE1 38 SEC EDE2 66 94 ROR $94 EDE4 D0 05 BNE $EDEB EDE6 48 PHA EDE7 20 40 ED JSR $ED40 EDEA 68 PLA EDEB 85 95 STA $95 EDED 18 CLC EDEE 60 RTS ; send talk on serial bus EDEF 78 SEI EDF0 20 8E EE JSR $EE8E EDF3 AD 00 DD LDA $DD00 EDF6 09 08 ORA #$08 EDF8 8D 00 DD STA $DD00 EDFB A9 5F LDA #$5F EDFD .BY $2C ; send unlisten on serial bus EDFE A9 3F LDA #$3F EE00 20 11 ED JSR $ED11 EE03 20 BE ED JSR $EDBE EE06 8A TXA EE07 A2 0A LDX #$0A EE09 CA DEX EE0A D0 FD BNE $EE09 EE0C AA TAX EE0D 20 85 EE JSR $EE85 EE10 4C 97 EE JMP $EE97 ; input byte on serial bus EE13 78 SEI EE14 A9 00 LDA #$00 EE16 85 A5 STA $A5 EE18 20 85 EE JSR $EE85 EE1B 20 A9 EE JSR $EEA9 EE1E 10 FB BPL $EE1B EE20 A9 01 LDA #$01 EE22 8D 07 DC STA $DC07 EE25 A9 19 LDA #$19 EE27 8D 0F DC STA $DC0F EE2A 20 97 EE JSR $EE97 EE2D AD 0D DC LDA $DC0D EE30 AD 0D DC LDA $DC0D EE33 29 02 AND #$02 EE35 D0 07 BNE $EE3E EE37 20 A9 EE JSR $EEA9 EE3A 30 F4 BMI $EE30 EE3C 10 18 BPL $EE56 EE3E A5 A5 LDA $A5 EE40 F0 05 BEQ $EE47 EE42 A9 02 LDA #$02 EE44 4C B2 ED JMP $EDB2 EE47 20 A0 EE JSR $EEA0 EE4A 20 85 EE JSR $EE85 EE4D A9 40 LDA #$40 EE4F 20 1C FE JSR $FE1C EE52 E6 A5 INC $A5 EE54 D0 CA BNE $EE20 EE56 A9 08 LDA #$08 EE58 85 A5 STA $A5 EE5A AD 00 DD LDA $DD00 EE5D CD 00 DD CMP $DD00 EE60 D0 F8 BNE $EE5A EE62 0A ASL EE63 10 F5 BPL $EE5A EE65 66 A4 ROR $A4 EE67 AD 00 DD LDA $DD00 EE6A CD 00 DD CMP $DD00 EE6D D0 F8 BNE $EE67 EE6F 0A ASL EE70 30 F5 BMI $EE67 EE72 C6 A5 DEC $A5 EE74 D0 E4 BNE $EE5A EE76 20 A0 EE JSR $EEA0 EE79 24 90 BIT $90 EE7B 50 03 BVC $EE80 EE7D 20 06 EE JSR $EE06 EE80 A5 A4 LDA $A4 EE82 58 CLI EE83 18 CLC EE84 60 RTS ; set serial clock line low EE85 AD 00 DD LDA $DD00 EE88 29 EF AND #$EF EE8A 8D 00 DD STA $DD00 EE8D 60 RTS ; set serial clock line high EE8E AD 00 DD LDA $DD00 EE91 09 10 ORA #$10 EE93 8D 00 DD STA $DD00 EE96 60 RTS ; set serial data line low EE97 AD 00 DD LDA $DD00 EE9A 29 DF AND #$DF EE9C 8D 00 DD STA $DD00 EE9F 60 RTS ; set serial data line high EEA0 AD 00 DD LDA $DD00 EEA3 09 20 ORA #$20 EEA5 8D 00 DD STA $DD00 EEA8 60 RTS EEA9 AD 00 DD LDA $DD00 EEAC CD 00 DD CMP $DD00 EEAF D0 F8 BNE $EEA9 EEB1 0A ASL EEB2 60 RTS ; delay 1 millisecond EEB3 8A TXA EEB4 A2 B8 LDX #$B8 EEB6 CA DEX EEB7 D0 FD BNE $EEB6 EEB9 AA TAX EEBA 60 RTS ; set next bit to transmit on RS-232 EEBB A5 B4 LDA $B4 EEBD F0 47 BEQ $EF06 EEBF 30 3F BMI $EF00 EEC1 46 B6 LSR $B6 EEC3 A2 00 LDX #$00 EEC5 90 01 BCC $EEC8 EEC7 CA DEX EEC8 8A TXA EEC9 45 BD EOR $BD EECB 85 BD STA $BD EECD C6 B4 DEC $B4 EECF F0 06 BEQ $EED7 EED1 8A TXA EED2 29 04 AND #$04 EED4 85 B5 STA $B5 EED6 60 RTS EED7 A9 20 LDA #$20 EED9 2C 94 02 BIT $0294 EEDC F0 14 BEQ $EEF2 EEDE 30 1C BMI $EEFC EEE0 70 14 BVS $EEF6 EEE2 A5 BD LDA $BD EEE4 D0 01 BNE $EEE7 EEE6 CA DEX EEE7 C6 B4 DEC $B4 EEE9 AD 93 02 LDA $0293 EEEC 10 E3 BPL $EED1 EEEE C6 B4 DEC $B4 EEF0 D0 DF BNE $EED1 EEF2 E6 B4 INC $B4 EEF4 D0 F0 BNE $EEE6 EEF6 A5 BD LDA $BD EEF8 F0 ED BEQ $EEE7 EEFA D0 EA BNE $EEE6 EEFC 70 E9 BVS $EEE7 EEFE 50 E6 BVC $EEE6 EF00 E6 B4 INC $B4 EF02 A2 FF LDX #$FF EF04 D0 CB BNE $EED1 EF06 AD 94 02 LDA $0294 EF09 4A LSR EF0A 90 07 BCC $EF13 EF0C 2C 01 DD BIT $DD01 EF0F 10 1D BPL $EF2E EF11 50 1E BVC $EF31 EF13 A9 00 LDA #$00 EF15 85 BD STA $BD EF17 85 B5 STA $B5 EF19 AE 98 02 LDX $0298 EF1C 86 B4 STX $B4 EF1E AC 9D 02 LDY $029D EF21 CC 9E 02 CPY $029E EF24 F0 13 BEQ $EF39 EF26 B1 F9 LDA ($F9),Y EF28 85 B6 STA $B6 EF2A EE 9D 02 INC $029D EF2D 60 RTS ; handle RS-232 errors EF2E A9 40 LDA #$40 EF30 .BY $2C EF31 A9 10 LDA #$10 EF33 0D 97 02 ORA $0297 EF36 8D 97 02 STA $0297 EF39 A9 01 LDA #$01 EF3B 8D 0D DD STA $DD0D EF3E 4D A1 02 EOR $02A1 EF41 09 80 ORA #$80 EF43 8D A1 02 STA $02A1 EF46 8D 0D DD STA $DD0D EF49 60 RTS ; check control register EF4A A2 09 LDX #$09 EF4C A9 20 LDA #$20 EF4E 2C 93 02 BIT $0293 EF51 F0 01 BEQ $EF54 EF53 CA DEX EF54 50 02 BVC $EF58 EF56 CA DEX EF57 CA DEX EF58 60 RTS ; add bit input on RS-232 bus to word being input EF59 A6 A9 LDX $A9 EF5B D0 33 BNE $EF90 EF5D C6 A8 DEC $A8 EF5F F0 36 BEQ $EF97 EF61 30 0D BMI $EF70 EF63 A5 A7 LDA $A7 EF65 45 AB EOR $AB EF67 85 AB STA $AB EF69 46 A7 LSR $A7 EF6B 66 AA ROR $AA EF6D 60 RTS ; handle end of word for RS-232 input EF6E C6 A8 DEC $A8 EF70 A5 A7 LDA $A7 EF72 F0 67 BEQ $EFDB EF74 AD 93 02 LDA $0293 EF77 0A ASL EF78 A9 01 LDA #$01 EF7A 65 A8 ADC $A8 EF7C D0 EF BNE $EF6D ; enable byte reception EF7E A9 90 LDA #$90 EF80 8D 0D DD STA $DD0D EF83 0D A1 02 ORA $02A1 EF86 8D A1 02 STA $02A1 EF89 85 A9 STA $A9 EF8B A9 02 LDA #$02 EF8D 4C 3B EF JMP $EF3B ; receiver start bit test EF90 A5 A7 LDA $A7 EF92 D0 EA BNE $EF7E EF94 4C D3 E4 JMP $E4D3 ; put received data into RS-232 buffer EF97 AC 9B 02 LDY $029B EF9A C8 INY EF9B CC 9C 02 CPY $029C EF9E F0 2A BEQ $EFCA EFA0 8C 9B 02 STY $029B EFA3 88 DEY EFA4 A5 AA LDA $AA EFA6 AE 98 02 LDX $0298 EFA9 E0 09 CPX #$09 EFAB F0 04 BEQ $EFB1 EFAD 4A LSR EFAE E8 INX EFAF D0 F8 BNE $EFA9 EFB1 91 F7 STA ($F7),Y EFB3 A9 20 LDA #$20 EFB5 2C 94 02 BIT $0294 EFB8 F0 B4 BEQ $EF6E EFBA 30 B1 BMI $EF6D EFBC A5 A7 LDA $A7 EFBE 45 AB EOR $AB EFC0 F0 03 BEQ $EFC5 EFC2 70 A9 BVS $EF6D EFC4 .BY $2C EFC5 50 A6 BVC $EF6D EFC7 A9 01 LDA #$01 EFC9 .BY $2C EFCA A9 04 LDA #$04 EFCC .BY $2C EFCD A9 80 LDA #$80 EFCF .BY $2C EFD0 A9 02 LDA #$02 EFD2 0D 97 02 ORA $0297 EFD5 8D 97 02 STA $0297 EFD8 4C 7E EF JMP $EF7E EFDB A5 AA LDA $AA EFDD D0 F1 BNE $EFD0 EFDF F0 EC BEQ $EFCD ; output of RS-232 device EFE1 85 9A STA $9A EFE3 AD 94 02 LDA $0294 EFE6 4A LSR EFE7 90 29 BCC $F012 EFE9 A9 02 LDA #$02 EFEB 2C 01 DD BIT $DD01 EFEE 10 1D BPL $F00D EFF0 D0 20 BNE $F012 EFF2 AD A1 02 LDA $02A1 EFF5 29 02 AND #$02 EFF7 D0 F9 BNE $EFF2 EFF9 2C 01 DD BIT $DD01 EFFC 70 FB BVS $EFF9 EFFE AD 01 DD LDA $DD01 F001 09 02 ORA #$02 F003 8D 01 DD STA $DD01 F006 2C 01 DD BIT $DD01 F009 70 07 BVS $F012 F00B 30 F9 BMI $F006 F00D A9 40 LDA #$40 F00F 8D 97 02 STA $0297 F012 18 CLC F013 60 RTS ; buffer char to output on RS-232 F014 20 28 F0 JSR $F028 F017 AC 9E 02 LDY $029E F01A C8 INY F01B CC 9D 02 CPY $029D F01E F0 F4 BEQ $F014 F020 8C 9E 02 STY $029E F023 88 DEY F024 A5 9E LDA $9E F026 91 F9 STA ($F9),Y F028 AD A1 02 LDA $02A1 F02B 4A LSR F02C B0 1E BCS $F04C F02E A9 10 LDA #$10 F030 8D 0E DD STA $DD0E F033 AD 99 02 LDA $0299 F036 8D 04 DD STA $DD04 F039 AD 9A 02 LDA $029A F03C 8D 05 DD STA $DD05 F03F A9 81 LDA #$81 F041 20 3B EF JSR $EF3B F044 20 06 EF JSR $EF06 F047 A9 11 LDA #$11 F049 8D 0E DD STA $DD0E F04C 60 RTS ; initalise RS-232 input F04D 85 99 STA $99 F04F AD 94 02 LDA $0294 F052 4A LSR F053 90 28 BCC $F07D F055 29 08 AND #$08 F057 F0 24 BEQ $F07D F059 A9 02 LDA #$02 F05B 2C 01 DD BIT $DD01 F05E 10 AD BPL $F00D F060 F0 22 BEQ $F084 F062 AD A1 02 LDA $02A1 F065 4A LSR F066 B0 FA BCS $F062 F068 AD 01 DD LDA $DD01 F06B 29 FD AND #$FD F06D 8D 01 DD STA $DD01 F070 AD 01 DD LDA $DD01 F073 29 04 AND #$04 F075 F0 F9 BEQ $F070 F077 A9 90 LDA #$90 F079 18 CLC F07A 4C 3B EF JMP $EF3B F07D AD A1 02 LDA $02A1 F080 29 12 AND #$12 F082 F0 F3 BEQ $F077 F084 18 CLC F085 60 RTS ; get next character from RS-232 input buffer F086 AD 97 02 LDA $0297 F089 AC 9C 02 LDY $029C F08C CC 9B 02 CPY $029B F08F F0 0B BEQ $F09C F091 29 F7 AND #$F7 F093 8D 97 02 STA $0297 F096 B1 F7 LDA ($F7),Y F098 EE 9C 02 INC $029C F09B 60 RTS F09C 09 08 ORA #$08 F09E 8D 97 02 STA $0297 F0A1 A9 00 LDA #$00 F0A3 60 RTS ; protect serial/casette routine from RS-232 NMI's F0A4 48 PHA F0A5 AD A1 02 LDA $02A1 F0A8 F0 11 BEQ $F0BB F0AA AD A1 02 LDA $02A1 F0AD 29 03 AND #$03 F0AF D0 F9 BNE $F0AA F0B1 A9 10 LDA #$10 F0B3 8D 0D DD STA $DD0D F0B6 A9 00 LDA #$00 F0B8 8D A1 02 STA $02A1 F0BB 68 PLA F0BC 60 RTS ; kernal I/O messages ; I/O error F0BD .BY $0D F0BE .BY $49,$2F,$4F F0C1 .BY $20,$45,$52,$52,$4F,$52 F0C7 .BY $20,$A3 ; searching for F0C9 .BY $0D F0CA .BY $53,$45,$41,$52,$43,$48,$49,$4E,$47,$A0 F0D4 .BY $46,$4F,$52,$A0 ; press play on tape F0D8 .BY $0D F0D9 .BY $50,$52,$45,$53,$53 F0DE .BY $20,$50,$4C,$41,$59 F0E3 .BY $20,$4F,$4E F0E6 .BY $20,$54,$41,$50,$C5 ; press record and play on tape F0EB .BY $50,$52,$45,$53,$53 F0F0 .BY $20,$52,$45,$43,$4F,$52,$44 F0F7 .BY $20,$26 F0F9 .BY $20,$50,$4C,$41,$59 F0FE .BY $20,$4F,$4E F101 .BY $20,$54,$41,$50,$C5 ; loading F106 .BY $0D F107 .BY $4C,$4F,$41,$44,$49,$4E,$C7 ; saving F10E .BY $0D F10F .BY $53,$41,$56,$49,$4E,$47,$A0 ; verifying F116 .BY $0D F117 .BY $56,$45,$52,$49,$46,$59,$49,$4E,$C7 ; found F120 .BY $0D F121 .BY $46,$4F,$55,$4E,$44,$A0 ; ok F127 .BY $0D F128 .BY $4F,$4B,$8D ; print kernal message indexed by Y F12B 24 9D BIT $9D F12D 10 0D BPL $F13C F12F B9 BD F0 LDA $F0BD,Y F132 08 PHP F133 29 7F AND #$7F F135 20 D2 FF JSR $FFD2 F138 C8 INY F139 28 PLP F13A 10 F3 BPL $F12F F13C 18 CLC F13D 60 RTS ; get a character F13E A5 99 LDA $99 F140 D0 08 BNE $F14A F142 A5 C6 LDA $C6 F144 F0 0F BEQ $F155 F146 78 SEI F147 4C B4 E5 JMP $E5B4 F14A C9 02 CMP #$02 F14C D0 18 BNE $F166 F14E 84 97 STY $97 F150 20 86 F0 JSR $F086 F153 A4 97 LDY $97 F155 18 CLC F156 60 RTS ; input a character F157 A5 99 LDA $99 F159 D0 0B BNE $F166 F15B A5 D3 LDA $D3 F15D 85 CA STA $CA F15F A5 D6 LDA $D6 F161 85 C9 STA $C9 F163 4C 32 E6 JMP $E632 F166 C9 03 CMP #$03 F168 D0 09 BNE $F173 F16A 85 D0 STA $D0 F16C A5 D5 LDA $D5 F16E 85 C8 STA $C8 F170 4C 32 E6 JMP $E632 F173 B0 38 BCS $F1AD F175 C9 02 CMP #$02 F177 F0 3F BEQ $F1B8 F179 86 97 STX $97 F17B 20 99 F1 JSR $F199 F17E B0 16 BCS $F196 F180 48 PHA F181 20 99 F1 JSR $F199 F184 B0 0D BCS $F193 F186 D0 05 BNE $F18D F188 A9 40 LDA #$40 F18A 20 1C FE JSR $FE1C F18D C6 A6 DEC $A6 F18F A6 97 LDX $97 F191 68 PLA F192 60 RTS F193 AA TAX F194 68 PLA F195 8A TXA F196 A6 97 LDX $97 F198 60 RTS ; read a byte from cassette buffer F199 20 0D F8 JSR $F80D F19C D0 0B BNE $F1A9 F19E 20 41 F8 JSR $F841 F1A1 B0 11 BCS $F1B4 F1A3 A9 00 LDA #$00 F1A5 85 A6 STA $A6 F1A7 F0 F0 BEQ $F199 F1A9 B1 B2 LDA ($B2),Y F1AB 18 CLC F1AC 60 RTS F1AD A5 90 LDA $90 F1AF F0 04 BEQ $F1B5 F1B1 A9 0D LDA #$0D F1B3 18 CLC F1B4 60 RTS ; read a byte from serial bus F1B5 4C 13 EE JMP $EE13 ; read a byte from RS-232 bus F1B8 20 4E F1 JSR $F14E F1BB B0 F7 BCS $F1B4 F1BD C9 00 CMP #$00 F1BF D0 F2 BNE $F1B3 F1C1 AD 97 02 LDA $0297 F1C4 29 60 AND #$60 F1C6 D0 E9 BNE $F1B1 F1C8 F0 EE BEQ $F1B8 ; output a character F1CA 48 PHA F1CB A5 9A LDA $9A F1CD C9 03 CMP #$03 F1CF D0 04 BNE $F1D5 F1D1 68 PLA F1D2 4C 16 E7 JMP $E716 F1D5 90 04 BCC $F1DB F1D7 68 PLA F1D8 4C DD ED JMP $EDDD F1DB 4A LSR F1DC 68 PLA F1DD 85 9E STA $9E F1DF 8A TXA F1E0 48 PHA F1E1 98 TYA F1E2 48 PHA F1E3 90 23 BCC $F208 F1E5 20 0D F8 JSR $F80D F1E8 D0 0E BNE $F1F8 F1EA 20 64 F8 JSR $F864 F1ED B0 0E BCS $F1FD F1EF A9 02 LDA #$02 F1F1 A0 00 LDY #$00 F1F3 91 B2 STA ($B2),Y F1F5 C8 INY F1F6 84 A6 STY $A6 F1F8 A5 9E LDA $9E F1FA 91 B2 STA ($B2),Y F1FC 18 CLC F1FD 68 PLA F1FE A8 TAY F1FF 68 PLA F200 AA TAX F201 A5 9E LDA $9E F203 90 02 BCC $F207 F205 A9 00 LDA #$00 F207 60 RTS F208 20 17 F0 JSR $F017 F20B 4C FC F1 JMP $F1FC ; set input device F20E 20 0F F3 JSR $F30F F211 F0 03 BEQ $F216 F213 4C 01 F7 JMP $F701 F216 20 1F F3 JSR $F31F F219 A5 BA LDA $BA F21B F0 16 BEQ $F233 F21D C9 03 CMP #$03 F21F F0 12 BEQ $F233 F221 B0 14 BCS $F237 F223 C9 02 CMP #$02 F225 D0 03 BNE $F22A F227 4C 4D F0 JMP $F04D F22A A6 B9 LDX $B9 F22C E0 60 CPX #$60 F22E F0 03 BEQ $F233 F230 4C 0A F7 JMP $F70A F233 85 99 STA $99 F235 18 CLC F236 60 RTS ; set serial bus input device F237 AA TAX F238 20 09 ED JSR $ED09 F23B A5 B9 LDA $B9 F23D 10 06 BPL $F245 F23F 20 CC ED JSR $EDCC F242 4C 48 F2 JMP $F248 F245 20 C7 ED JSR $EDC7 F248 8A TXA F249 24 90 BIT $90 F24B 10 E6 BPL $F233 F24D 4C 07 F7 JMP $F707 ; set output device F250 20 0F F3 JSR $F30F F253 F0 03 BEQ $F258 F255 4C 01 F7 JMP $F701 F258 20 1F F3 JSR $F31F F25B A5 BA LDA $BA F25D D0 03 BNE $F262 F25F 4C 0D F7 JMP $F70D F262 C9 03 CMP #$03 F264 F0 0F BEQ $F275 F266 B0 11 BCS $F279 F268 C9 02 CMP #$02 F26A D0 03 BNE $F26F F26C 4C E1 EF JMP $EFE1 F26F A6 B9 LDX $B9 F271 E0 60 CPX #$60 F273 F0 EA BEQ $F25F F275 85 9A STA $9A F277 18 CLC F278 60 RTS ; set serial bus output device F279 AA TAX F27A 20 0C ED JSR $ED0C F27D A5 B9 LDA $B9 F27F 10 05 BPL $F286 F281 20 BE ED JSR $EDBE F284 D0 03 BNE $F289 F286 20 B9 ED JSR $EDB9 F289 8A TXA F28A 24 90 BIT $90 F28C 10 E7 BPL $F275 F28E 4C 07 F7 JMP $F707 ; close a file F291 20 14 F3 JSR $F314 F294 F0 02 BEQ $F298 F296 18 CLC F297 60 RTS F298 20 1F F3 JSR $F31F F29B 8A TXA F29C 48 PHA F29D A5 BA LDA $BA F29F F0 50 BEQ $F2F1 F2A1 C9 03 CMP #$03 F2A3 F0 4C BEQ $F2F1 F2A5 B0 47 BCS $F2EE F2A7 C9 02 CMP #$02 F2A9 D0 1D BNE $F2C8 F2AB 68 PLA F2AC 20 F2 F2 JSR $F2F2 F2AF 20 83 F4 JSR $F483 F2B2 20 27 FE JSR $FE27 F2B5 A5 F8 LDA $F8 F2B7 F0 01 BEQ $F2BA F2B9 C8 INY F2BA A5 FA LDA $FA F2BC F0 01 BEQ $F2BF F2BE C8 INY F2BF A9 00 LDA #$00 F2C1 85 F8 STA $F8 F2C3 85 FA STA $FA F2C5 4C 7D F4 JMP $F47D ; close cassette device F2C8 A5 B9 LDA $B9 F2CA 29 0F AND #$0F F2CC F0 23 BEQ $F2F1 F2CE 20 D0 F7 JSR $F7D0 F2D1 A9 00 LDA #$00 F2D3 38 SEC F2D4 20 DD F1 JSR $F1DD F2D7 20 64 F8 JSR $F864 F2DA 90 04 BCC $F2E0 F2DC 68 PLA F2DD A9 00 LDA #$00 F2DF 60 RTS F2E0 A5 B9 LDA $B9 F2E2 C9 62 CMP #$62 F2E4 D0 0B BNE $F2F1 F2E6 A9 05 LDA #$05 F2E8 20 6A F7 JSR $F76A F2EB 4C F1 F2 JMP $F2F1 ; close serial bus device F2EE 20 42 F6 JSR $F642 F2F1 68 PLA ; reorganise file tables F2F2 AA TAX F2F3 C6 98 DEC $98 F2F5 E4 98 CPX $98 F2F7 F0 14 BEQ $F30D F2F9 A4 98 LDY $98 F2FB B9 59 02 LDA $0259,Y F2FE 9D 59 02 STA $0259,X F301 B9 63 02 LDA $0263,Y F304 9D 63 02 STA $0263,X F307 B9 6D 02 LDA $026D,Y F30A 9D 6D 02 STA $026D,X F30D 18 CLC F30E 60 RTS ; check X against logical file table F30F A9 00 LDA #$00 F311 85 90 STA $90 F313 8A TXA F314 A6 98 LDX $98 F316 CA DEX F317 30 15 BMI $F32E F319 DD 59 02 CMP $0259,X F31C D0 F8 BNE $F316 F31E 60 RTS ; set file parameters depending on X F31F BD 59 02 LDA $0259,X F322 85 B8 STA $B8 F324 BD 63 02 LDA $0263,X F327 85 BA STA $BA F329 BD 6D 02 LDA $026D,X F32C 85 B9 STA $B9 F32E 60 RTS ; close all files F32F A9 00 LDA #$00 F331 85 98 STA $98 ; restore I/O to default devices F333 A2 03 LDX #$03 F335 E4 9A CPX $9A F337 B0 03 BCS $F33C F339 20 FE ED JSR $EDFE F33C E4 99 CPX $99 F33E B0 03 BCS $F343 F340 20 EF ED JSR $EDEF F343 86 9A STX $9A F345 A9 00 LDA #$00 F347 85 99 STA $99 F349 60 RTS ; open a file F34A A6 B8 LDX $B8 F34C D0 03 BNE $F351 F34E 4C 0A F7 JMP $F70A F351 20 0F F3 JSR $F30F F354 D0 03 BNE $F359 F356 4C FE F6 JMP $F6FE F359 A6 98 LDX $98 F35B E0 0A CPX #$0A F35D 90 03 BCC $F362 F35F 4C FB F6 JMP $F6FB F362 E6 98 INC $98 F364 A5 B8 LDA $B8 F366 9D 59 02 STA $0259,X F369 A5 B9 LDA $B9 F36B 09 60 ORA #$60 F36D 85 B9 STA $B9 F36F 9D 6D 02 STA $026D,X F372 A5 BA LDA $BA F374 9D 63 02 STA $0263,X F377 F0 5A BEQ $F3D3 F379 C9 03 CMP #$03 F37B F0 56 BEQ $F3D3 F37D 90 05 BCC $F384 F37F 20 D5 F3 JSR $F3D5 F382 90 4F BCC $F3D3 F384 C9 02 CMP #$02 F386 D0 03 BNE $F38B F388 4C 09 F4 JMP $F409 ; open for cassette device F38B 20 D0 F7 JSR $F7D0 F38E B0 03 BCS $F393 F390 4C 13 F7 JMP $F713 F393 A5 B9 LDA $B9 F395 29 0F AND #$0F F397 D0 1F BNE $F3B8 F399 20 17 F8 JSR $F817 F39C B0 36 BCS $F3D4 F39E 20 AF F5 JSR $F5AF F3A1 A5 B7 LDA $B7 F3A3 F0 0A BEQ $F3AF F3A5 20 EA F7 JSR $F7EA F3A8 90 18 BCC $F3C2 F3AA F0 28 BEQ $F3D4 F3AC 4C 04 F7 JMP $F704 F3AF 20 2C F7 JSR $F72C F3B2 F0 20 BEQ $F3D4 F3B4 90 0C BCC $F3C2 F3B6 B0 F4 BCS $F3AC ; open cassette for input F3B8 20 38 F8 JSR $F838 F3BB B0 17 BCS $F3D4 F3BD A9 04 LDA #$04 F3BF 20 6A F7 JSR $F76A F3C2 A9 BF LDA #$BF F3C4 A4 B9 LDY $B9 F3C6 C0 60 CPY #$60 F3C8 F0 07 BEQ $F3D1 F3CA A0 00 LDY #$00 F3CC A9 02 LDA #$02 F3CE 91 B2 STA ($B2),Y F3D0 98 TYA F3D1 85 A6 STA $A6 F3D3 18 CLC F3D4 60 RTS ; open for serial bus devices F3D5 A5 B9 LDA $B9 F3D7 30 FA BMI $F3D3 F3D9 A4 B7 LDY $B7 F3DB F0 F6 BEQ $F3D3 F3DD A9 00 LDA #$00 F3DF 85 90 STA $90 F3E1 A5 BA LDA $BA F3E3 20 0C ED JSR $ED0C F3E6 A5 B9 LDA $B9 F3E8 09 F0 ORA #$F0 F3EA 20 B9 ED JSR $EDB9 F3ED A5 90 LDA $90 F3EF 10 05 BPL $F3F6 F3F1 68 PLA F3F2 68 PLA F3F3 4C 07 F7 JMP $F707 F3F6 A5 B7 LDA $B7 F3F8 F0 0C BEQ $F406 F3FA A0 00 LDY #$00 F3FC B1 BB LDA ($BB),Y F3FE 20 DD ED JSR $EDDD F401 C8 INY F402 C4 B7 CPY $B7 F404 D0 F6 BNE $F3FC F406 4C 54 F6 JMP $F654 ; open RS-232 device F409 20 83 F4 JSR $F483 F40C 8C 97 02 STY $0297 F40F C4 B7 CPY $B7 F411 F0 0A BEQ $F41D F413 B1 BB LDA ($BB),Y F415 99 93 02 STA $0293,Y F418 C8 INY F419 C0 04 CPY #$04 F41B D0 F2 BNE $F40F F41D 20 4A EF JSR $EF4A F420 8E 98 02 STX $0298 F423 AD 93 02 LDA $0293 F426 29 0F AND #$0F F428 F0 1C BEQ $F446 F42A 0A ASL F42B AA TAX F42C AD A6 02 LDA $02A6 F42F D0 09 BNE $F43A F431 BC C1 FE LDY $FEC1,X F434 BD C0 FE LDA $FEC0,X F437 4C 40 F4 JMP $F440 F43A BC EB E4 LDY $E4EB,X F43D BD EA E4 LDA $E4EA,X F440 8C 96 02 STY $0296 F443 8D 95 02 STA $0295 F446 AD 95 02 LDA $0295 F449 0A ASL F44A 20 2E FF JSR $FF2E F44D AD 94 02 LDA $0294 F450 4A LSR F451 90 09 BCC $F45C F453 AD 01 DD LDA $DD01 F456 0A ASL F457 B0 03 BCS $F45C F459 20 0D F0 JSR $F00D F45C AD 9B 02 LDA $029B F45F 8D 9C 02 STA $029C F462 AD 9E 02 LDA $029E F465 8D 9D 02 STA $029D F468 20 27 FE JSR $FE27 F46B A5 F8 LDA $F8 F46D D0 05 BNE $F474 F46F 88 DEY F470 84 F8 STY $F8 F472 86 F7 STX $F7 F474 A5 FA LDA $FA F476 D0 05 BNE $F47D F478 88 DEY F479 84 FA STY $FA F47B 86 F9 STX $F9 F47D 38 SEC F47E A9 F0 LDA #$F0 F480 4C 2D FE JMP $FE2D ; initialise CIA2 F483 A9 7F LDA #$7F F485 8D 0D DD STA $DD0D F488 A9 06 LDA #$06 F48A 8D 03 DD STA $DD03 F48D 8D 01 DD STA $DD01 F490 A9 04 LDA #$04 F492 0D 00 DD ORA $DD00 F495 8D 00 DD STA $DD00 F498 A0 00 LDY #$00 F49A 8C A1 02 STY $02A1 F49D 60 RTS ; load ram from a device F49E 86 C3 STX $C3 F4A0 84 C4 STY $C4 F4A2 6C 30 03 JMP ($0330) ; normally F4A5 ; standard load ram entry F4A5 85 93 STA $93 F4A7 A9 00 LDA #$00 F4A9 85 90 STA $90 F4AB A5 BA LDA $BA F4AD D0 03 BNE $F4B2 F4AF 4C 13 F7 JMP $F713 F4B2 C9 03 CMP #$03 F4B4 F0 F9 BEQ $F4AF F4B6 90 7B BCC $F533 F4B8 A4 B7 LDY $B7 F4BA D0 03 BNE $F4BF F4BC 4C 10 F7 JMP $F710 F4BF A6 B9 LDX $B9 F4C1 20 AF F5 JSR $F5AF F4C4 A9 60 LDA #$60 F4C6 85 B9 STA $B9 F4C8 20 D5 F3 JSR $F3D5 F4CB A5 BA LDA $BA F4CD 20 09 ED JSR $ED09 F4D0 A5 B9 LDA $B9 F4D2 20 C7 ED JSR $EDC7 F4D5 20 13 EE JSR $EE13 F4D8 85 AE STA $AE F4DA A5 90 LDA $90 F4DC 4A LSR F4DD 4A LSR F4DE B0 50 BCS $F530 F4E0 20 13 EE JSR $EE13 F4E3 85 AF STA $AF F4E5 8A TXA F4E6 D0 08 BNE $F4F0 F4E8 A5 C3 LDA $C3 F4EA 85 AE STA $AE F4EC A5 C4 LDA $C4 F4EE 85 AF STA $AF F4F0 20 D2 F5 JSR $F5D2 F4F3 A9 FD LDA #$FD F4F5 25 90 AND $90 F4F7 85 90 STA $90 F4F9 20 E1 FF JSR $FFE1 F4FC D0 03 BNE $F501 F4FE 4C 33 F6 JMP $F633 F501 20 13 EE JSR $EE13 F504 AA TAX F505 A5 90 LDA $90 F507 4A LSR F508 4A LSR F509 B0 E8 BCS $F4F3 F50B 8A TXA F50C A4 93 LDY $93 F50E F0 0C BEQ $F51C F510 A0 00 LDY #$00 F512 D1 AE CMP ($AE),Y F514 F0 08 BEQ $F51E F516 A9 10 LDA #$10 F518 20 1C FE JSR $FE1C F51B .BY $2C F51C 91 AE STA ($AE),Y F51E E6 AE INC $AE F520 D0 02 BNE $F524 F522 E6 AF INC $AF F524 24 90 BIT $90 F526 50 CB BVC $F4F3 F528 20 EF ED JSR $EDEF F52B 20 42 F6 JSR $F642 F52E 90 79 BCC $F5A9 F530 4C 04 F7 JMP $F704 F533 4A LSR F534 B0 03 BCS $F539 F536 4C 13 F7 JMP $F713 F539 20 D0 F7 JSR $F7D0 F53C B0 03 BCS $F541 F53E 4C 13 F7 JMP $F713 F541 20 17 F8 JSR $F817 F544 B0 68 BCS $F5AE F546 20 AF F5 JSR $F5AF F549 A5 B7 LDA $B7 F54B F0 09 BEQ $F556 F54D 20 EA F7 JSR $F7EA F550 90 0B BCC $F55D F552 F0 5A BEQ $F5AE F554 B0 DA BCS $F530 F556 20 2C F7 JSR $F72C F559 F0 53 BEQ $F5AE F55B B0 D3 BCS $F530 F55D A5 90 LDA $90 F55F 29 10 AND #$10 F561 38 SEC F562 D0 4A BNE $F5AE F564 E0 01 CPX #$01 F566 F0 11 BEQ $F579 F568 E0 03 CPX #$03 F56A D0 DD BNE $F549 F56C A0 01 LDY #$01 F56E B1 B2 LDA ($B2),Y F570 85 C3 STA $C3 F572 C8 INY F573 B1 B2 LDA ($B2),Y F575 85 C4 STA $C4 F577 B0 04 BCS $F57D F579 A5 B9 LDA $B9 F57B D0 EF BNE $F56C F57D A0 03 LDY #$03 F57F B1 B2 LDA ($B2),Y F581 A0 01 LDY #$01 F583 F1 B2 SBC ($B2),Y F585 AA TAX F586 A0 04 LDY #$04 F588 B1 B2 LDA ($B2),Y F58A A0 02 LDY #$02 F58C F1 B2 SBC ($B2),Y F58E A8 TAY F58F 18 CLC F590 8A TXA F591 65 C3 ADC $C3 F593 85 AE STA $AE F595 98 TYA F596 65 C4 ADC $C4 F598 85 AF STA $AF F59A A5 C3 LDA $C3 F59C 85 C1 STA $C1 F59E A5 C4 LDA $C4 F5A0 85 C2 STA $C2 F5A2 20 D2 F5 JSR $F5D2 F5A5 20 4A F8 JSR $F84A F5A8 .BY $24 F5A9 18 CLC F5AA A6 AE LDX $AE F5AC A4 AF LDY $AF F5AE 60 RTS ; handle messages for loading F5AF A5 9D LDA $9D F5B1 10 1E BPL $F5D1 F5B3 A0 0C LDY #$0C F5B5 20 2F F1 JSR $F12F F5B8 A5 B7 LDA $B7 F5BA F0 15 BEQ $F5D1 F5BC A0 17 LDY #$17 F5BE 20 2F F1 JSR $F12F F5C1 A4 B7 LDY $B7 F5C3 F0 0C BEQ $F5D1 F5C5 A0 00 LDY #$00 F5C7 B1 BB LDA ($BB),Y F5C9 20 D2 FF JSR $FFD2 F5CC C8 INY F5CD C4 B7 CPY $B7 F5CF D0 F6 BNE $F5C7 F5D1 60 RTS ; do load/verify message F5D2 A0 49 LDY #$49 F5D4 A5 93 LDA $93 F5D6 F0 02 BEQ $F5DA F5D8 A0 59 LDY #$59 F5DA 4C 2B F1 JMP $F12B ; save ram to a device F5DD 86 AE STX $AE F5DF 84 AF STY $AF F5E1 AA TAX F5E2 B5 00 LDA $00,X F5E4 85 C1 STA $C1 F5E6 B5 01 LDA $01,X F5E8 85 C2 STA $C2 F5EA 6C 32 03 JMP ($0332) ; normally F5ED ; standard save ram entry F5ED A5 BA LDA $BA F5EF D0 03 BNE $F5F4 F5F1 4C 13 F7 JMP $F713 F5F4 C9 03 CMP #$03 F5F6 F0 F9 BEQ $F5F1 F5F8 90 5F BCC $F659 F5FA A9 61 LDA #$61 F5FC 85 B9 STA $B9 F5FE A4 B7 LDY $B7 F600 D0 03 BNE $F605 F602 4C 10 F7 JMP $F710 F605 20 D5 F3 JSR $F3D5 F608 20 8F F6 JSR $F68F F60B A5 BA LDA $BA F60D 20 0C ED JSR $ED0C F610 A5 B9 LDA $B9 F612 20 B9 ED JSR $EDB9 F615 A0 00 LDY #$00 F617 20 8E FB JSR $FB8E F61A A5 AC LDA $AC F61C 20 DD ED JSR $EDDD F61F A5 AD LDA $AD F621 20 DD ED JSR $EDDD F624 20 D1 FC JSR $FCD1 F627 B0 16 BCS $F63F F629 B1 AC LDA ($AC),Y F62B 20 DD ED JSR $EDDD F62E 20 E1 FF JSR $FFE1 F631 D0 07 BNE $F63A F633 20 42 F6 JSR $F642 F636 A9 00 LDA #$00 F638 38 SEC F639 60 RTS F63A 20 DB FC JSR $FCDB F63D D0 E5 BNE $F624 F63F 20 FE ED JSR $EDFE ; close serial bus device F642 24 B9 BIT $B9 F644 30 11 BMI $F657 F646 A5 BA LDA $BA F648 20 0C ED JSR $ED0C F64B A5 B9 LDA $B9 F64D 29 EF AND #$EF F64F 09 E0 ORA #$E0 F651 20 B9 ED JSR $EDB9 F654 20 FE ED JSR $EDFE F657 18 CLC F658 60 RTS F659 4A LSR F65A B0 03 BCS $F65F F65C 4C 13 F7 JMP $F713 ; save ram to cassette F65F 20 D0 F7 JSR $F7D0 F662 90 8D BCC $F5F1 F664 20 38 F8 JSR $F838 F667 B0 25 BCS $F68E F669 20 8F F6 JSR $F68F F66C A2 03 LDX #$03 F66E A5 B9 LDA $B9 F670 29 01 AND #$01 F672 D0 02 BNE $F676 F674 A2 01 LDX #$01 F676 8A TXA F677 20 6A F7 JSR $F76A F67A B0 12 BCS $F68E F67C 20 67 F8 JSR $F867 F67F B0 0D BCS $F68E F681 A5 B9 LDA $B9 F683 29 02 AND #$02 F685 F0 06 BEQ $F68D F687 A9 05 LDA #$05 F689 20 6A F7 JSR $F76A F68C .BY $24 F68D 18 CLC F68E 60 RTS ; do saving message and filename F68F A5 9D LDA $9D F691 10 FB BPL $F68E F693 A0 51 LDY #$51 F695 20 2F F1 JSR $F12F F698 4C C1 F5 JMP $F5C1 ; increment real time clock F69B A2 00 LDX #$00 F69D E6 A2 INC $A2 F69F D0 06 BNE $F6A7 F6A1 E6 A1 INC $A1 F6A3 D0 02 BNE $F6A7 F6A5 E6 A0 INC $A0 F6A7 38 SEC F6A8 A5 A2 LDA $A2 F6AA E9 01 SBC #$01 F6AC A5 A1 LDA $A1 F6AE E9 1A SBC #$1A F6B0 A5 A0 LDA $A0 F6B2 E9 4F SBC #$4F F6B4 90 06 BCC $F6BC F6B6 86 A0 STX $A0 F6B8 86 A1 STX $A1 F6BA 86 A2 STX $A2 F6BC AD 01 DC LDA $DC01 F6BF CD 01 DC CMP $DC01 F6C2 D0 F8 BNE $F6BC F6C4 AA TAX F6C5 30 13 BMI $F6DA F6C7 A2 BD LDX #$BD F6C9 8E 00 DC STX $DC00 F6CC AE 01 DC LDX $DC01 F6CF EC 01 DC CPX $DC01 F6D2 D0 F8 BNE $F6CC F6D4 8D 00 DC STA $DC00 F6D7 E8 INX F6D8 D0 02 BNE $F6DC F6DA 85 91 STA $91 F6DC 60 RTS ; read real time clock F6DD 78 SEI F6DE A5 A2 LDA $A2 F6E0 A6 A1 LDX $A1 F6E2 A4 A0 LDY $A0 ; set real time clock F6E4 78 SEI F6E5 85 A2 STA $A2 F6E7 86 A1 STX $A1 F6E9 84 A0 STY $A0 F6EB 58 CLI F6EC 60 RTS ; test STOP key F6ED A5 91 LDA $91 F6EF C9 7F CMP #$7F F6F1 D0 07 BNE $F6FA F6F3 08 PHP F6F4 20 CC FF JSR $FFCC F6F7 85 C6 STA $C6 F6F9 28 PLP F6FA 60 RTS ; handle I/O errors F6FB A9 01 LDA #$01 ; too many files F6FD .BY $2C F6FE A9 02 LDA #$02 ; file open F700 .BY $2C F701 A9 03 LDA #$03 ; file not open F703 .BY $2C F704 A9 04 LDA #$04 ; file not found F706 .BY $2C F707 A9 05 LDA #$05 ; device not present F709 .BY $2C F70A A9 06 LDA #$06 ; not input file F70C .BY $2C F70D A9 07 LDA #$07 ; not output file F70F .BY $2C F710 A9 08 LDA #$08 ; file name missing F712 .BY $2C F713 A9 09 LDA #$09 ; illegal device no. F715 48 PHA F716 20 CC FF JSR $FFCC F719 A0 00 LDY #$00 F71B 24 9D BIT $9D F71D 50 0A BVC $F729 F71F 20 2F F1 JSR $F12F F722 68 PLA F723 48 PHA F724 09 30 ORA #$30 F726 20 D2 FF JSR $FFD2 F729 68 PLA F72A 38 SEC F72B 60 RTS ; get next file header from cassette F72C A5 93 LDA $93 F72E 48 PHA F72F 20 41 F8 JSR $F841 F732 68 PLA F733 85 93 STA $93 F735 B0 32 BCS $F769 F737 A0 00 LDY #$00 F739 B1 B2 LDA ($B2),Y F73B C9 05 CMP #$05 F73D F0 2A BEQ $F769 F73F C9 01 CMP #$01 F741 F0 08 BEQ $F74B F743 C9 03 CMP #$03 F745 F0 04 BEQ $F74B F747 C9 04 CMP #$04 F749 D0 E1 BNE $F72C F74B AA TAX F74C 24 9D BIT $9D F74E 10 17 BPL $F767 F750 A0 63 LDY #$63 F752 20 2F F1 JSR $F12F F755 A0 05 LDY #$05 F757 B1 B2 LDA ($B2),Y F759 20 D2 FF JSR $FFD2 F75C C8 INY F75D C0 15 CPY #$15 F75F D0 F6 BNE $F757 F761 A5 A1 LDA $A1 F763 20 E0 E4 JSR $E4E0 F766 EA NOP F767 18 CLC F768 88 DEY F769 60 RTS ; write a special block to cassette with code in A F76A 85 9E STA $9E F76C 20 D0 F7 JSR $F7D0 F76F 90 5E BCC $F7CF F771 A5 C2 LDA $C2 F773 48 PHA F774 A5 C1 LDA $C1 F776 48 PHA F777 A5 AF LDA $AF F779 48 PHA F77A A5 AE LDA $AE F77C 48 PHA F77D A0 BF LDY #$BF F77F A9 20 LDA #$20 F781 91 B2 STA ($B2),Y F783 88 DEY F784 D0 FB BNE $F781 F786 A5 9E LDA $9E F788 91 B2 STA ($B2),Y F78A C8 INY F78B A5 C1 LDA $C1 F78D 91 B2 STA ($B2),Y F78F C8 INY F790 A5 C2 LDA $C2 F792 91 B2 STA ($B2),Y F794 C8 INY F795 A5 AE LDA $AE F797 91 B2 STA ($B2),Y F799 C8 INY F79A A5 AF LDA $AF F79C 91 B2 STA ($B2),Y F79E C8 INY F79F 84 9F STY $9F F7A1 A0 00 LDY #$00 F7A3 84 9E STY $9E F7A5 A4 9E LDY $9E F7A7 C4 B7 CPY $B7 F7A9 F0 0C BEQ $F7B7 F7AB B1 BB LDA ($BB),Y F7AD A4 9F LDY $9F F7AF 91 B2 STA ($B2),Y F7B1 E6 9E INC $9E F7B3 E6 9F INC $9F F7B5 D0 EE BNE $F7A5 F7B7 20 D7 F7 JSR $F7D7 F7BA A9 69 LDA #$69 F7BC 85 AB STA $AB F7BE 20 6B F8 JSR $F86B F7C1 A8 TAY F7C2 68 PLA F7C3 85 AE STA $AE F7C5 68 PLA F7C6 85 AF STA $AF F7C8 68 PLA F7C9 85 C1 STA $C1 F7CB 68 PLA F7CC 85 C2 STA $C2 F7CE 98 TYA F7CF 60 RTS ; set tape buffer pointer in XY F7D0 A6 B2 LDX $B2 F7D2 A4 B3 LDY $B3 F7D4 C0 02 CPY #$02 F7D6 60 RTS ; set cassette buffer to I/O area F7D7 20 D0 F7 JSR $F7D0 F7DA 8A TXA F7DB 85 C1 STA $C1 F7DD 18 CLC F7DE 69 C0 ADC #$C0 F7E0 85 AE STA $AE F7E2 98 TYA F7E3 85 C2 STA $C2 F7E5 69 00 ADC #$00 F7E7 85 AF STA $AF F7E9 60 RTS ; search tape for a file name F7EA 20 2C F7 JSR $F72C F7ED B0 1D BCS $F80C F7EF A0 05 LDY #$05 F7F1 84 9F STY $9F F7F3 A0 00 LDY #$00 F7F5 84 9E STY $9E F7F7 C4 B7 CPY $B7 F7F9 F0 10 BEQ $F80B F7FB B1 BB LDA ($BB),Y F7FD A4 9F LDY $9F F7FF D1 B2 CMP ($B2),Y F801 D0 E7 BNE $F7EA F803 E6 9E INC $9E F805 E6 9F INC $9F F807 A4 9E LDY $9E F809 D0 EC BNE $F7F7 F80B 18 CLC F80C 60 RTS ; add 1 to tape index and test for overflow F80D 20 D0 F7 JSR $F7D0 F810 E6 A6 INC $A6 F812 A4 A6 LDY $A6 F814 C0 C0 CPY #$C0 F816 60 RTS ; handle messages and ; test cassette buttons for read F817 20 2E F8 JSR $F82E F81A F0 1A BEQ $F836 F81C A0 1B LDY #$1B F81E 20 2F F1 JSR $F12F F821 20 D0 F8 JSR $F8D0 F824 20 2E F8 JSR $F82E F827 D0 F8 BNE $F821 F829 A0 6A LDY #$6A F82B 4C 2F F1 JMP $F12F ; test sense line for a button ; depressed on cassette F82E A9 10 LDA #$10 F830 24 01 BIT $01 F832 D0 02 BNE $F836 F834 24 01 BIT $01 F836 18 CLC F837 60 RTS ; set messages and test cassette line ; for input F838 20 2E F8 JSR $F82E F83B F0 F9 BEQ $F836 F83D A0 2E LDY #$2E F83F D0 DD BNE $F81E ; read a block from cassette F841 A9 00 LDA #$00 F843 85 90 STA $90 F845 85 93 STA $93 F847 20 D7 F7 JSR $F7D7 F84A 20 17 F8 JSR $F817 F84D B0 1F BCS $F86E F84F 78 SEI F850 A9 00 LDA #$00 F852 85 AA STA $AA F854 85 B4 STA $B4 F856 85 B0 STA $B0 F858 85 9E STA $9E F85A 85 9F STA $9F F85C 85 9C STA $9C F85E A9 90 LDA #$90 F860 A2 0E LDX #$0E F862 D0 11 BNE $F875 ; write a block from cassette F864 20 D7 F7 JSR $F7D7 F867 A9 14 LDA #$14 F869 85 AB STA $AB F86B 20 38 F8 JSR $F838 F86E B0 6C BCS $F8DC F870 78 SEI F871 A9 82 LDA #$82 F873 A2 08 LDX #$08 ; common code for cassette read and write F875 A0 7F LDY #$7F F877 8C 0D DC STY $DC0D F87A 8D 0D DC STA $DC0D F87D AD 0E DC LDA $DC0E F880 09 19 ORA #$19 F882 8D 0F DC STA $DC0F F885 29 91 AND #$91 F887 8D A2 02 STA $02A2 F88A 20 A4 F0 JSR $F0A4 F88D AD 11 D0 LDA $D011 F890 29 EF AND #$EF F892 8D 11 D0 STA $D011 F895 AD 14 03 LDA $0314 F898 8D 9F 02 STA $029F F89B AD 15 03 LDA $0315 F89E 8D A0 02 STA $02A0 F8A1 20 BD FC JSR $FCBD F8A4 A9 02 LDA #$02 F8A6 85 BE STA $BE F8A8 20 97 FB JSR $FB97 F8AB A5 01 LDA $01 F8AD 29 1F AND #$1F F8AF 85 01 STA $01 F8B1 85 C0 STA $C0 F8B3 A2 FF LDX #$FF F8B5 A0 FF LDY #$FF F8B7 88 DEY F8B8 D0 FD BNE $F8B7 F8BA CA DEX F8BB D0 F8 BNE $F8B5 F8BD 58 CLI F8BE AD A0 02 LDA $02A0 F8C1 CD 15 03 CMP $0315 F8C4 18 CLC F8C5 F0 15 BEQ $F8DC F8C7 20 D0 F8 JSR $F8D0 F8CA 20 BC F6 JSR $F6BC F8CD 4C BE F8 JMP $F8BE ; handle stop key during cassette operations F8D0 20 E1 FF JSR $FFE1 F8D3 18 CLC F8D4 D0 0B BNE $F8E1 F8D6 20 93 FC JSR $FC93 F8D9 38 SEC F8DA 68 PLA F8DB 68 PLA F8DC A9 00 LDA #$00 F8DE 8D A0 02 STA $02A0 F8E1 60 RTS ; schedule CIA1 timer A depending on X F8E2 86 B1 STX $B1 F8E4 A5 B0 LDA $B0 F8E6 0A ASL F8E7 0A ASL F8E8 18 CLC F8E9 65 B0 ADC $B0 F8EB 18 CLC F8EC 65 B1 ADC $B1 F8EE 85 B1 STA $B1 F8F0 A9 00 LDA #$00 F8F2 24 B0 BIT $B0 F8F4 30 01 BMI $F8F7 F8F6 2A ROL F8F7 06 B1 ASL $B1 F8F9 2A ROL F8FA 06 B1 ASL $B1 F8FC 2A ROL F8FD AA TAX F8FE AD 06 DC LDA $DC06 F901 C9 16 CMP #$16 F903 90 F9 BCC $F8FE F905 65 B1 ADC $B1 F907 8D 04 DC STA $DC04 F90A 8A TXA F90B 6D 07 DC ADC $DC07 F90E 8D 05 DC STA $DC05 F911 AD A2 02 LDA $02A2 F914 8D 0E DC STA $DC0E F917 8D A4 02 STA $02A4 F91A AD 0D DC LDA $DC0D F91D 29 10 AND #$10 F91F F0 09 BEQ $F92A F921 A9 F9 LDA #$F9 F923 48 PHA F924 A9 2A LDA #$2A F926 48 PHA F927 4C 43 FF JMP $FF43 F92A 58 CLI F92B 60 RTS ; cassette read IRQ routine F92C AE 07 DC LDX $DC07 F92F A0 FF LDY #$FF F931 98 TYA F932 ED 06 DC SBC $DC06 F935 EC 07 DC CPX $DC07 F938 D0 F2 BNE $F92C F93A 86 B1 STX $B1 F93C AA TAX F93D 8C 06 DC STY $DC06 F940 8C 07 DC STY $DC07 F943 A9 19 LDA #$19 F945 8D 0F DC STA $DC0F F948 AD 0D DC LDA $DC0D F94B 8D A3 02 STA $02A3 F94E 98 TYA F94F E5 B1 SBC $B1 F951 86 B1 STX $B1 F953 4A LSR F954 66 B1 ROR $B1 F956 4A LSR F957 66 B1 ROR $B1 F959 A5 B0 LDA $B0 F95B 18 CLC F95C 69 3C ADC #$3C F95E C5 B1 CMP $B1 F960 B0 4A BCS $F9AC F962 A6 9C LDX $9C F964 F0 03 BEQ $F969 F966 4C 60 FA JMP $FA60 F969 A6 A3 LDX $A3 F96B 30 1B BMI $F988 F96D A2 00 LDX #$00 F96F 69 30 ADC #$30 F971 65 B0 ADC $B0 F973 C5 B1 CMP $B1 F975 B0 1C BCS $F993 F977 E8 INX F978 69 26 ADC #$26 F97A 65 B0 ADC $B0 F97C C5 B1 CMP $B1 F97E B0 17 BCS $F997 F980 69 2C ADC #$2C F982 65 B0 ADC $B0 F984 C5 B1 CMP $B1 F986 90 03 BCC $F98B F988 4C 10 FA JMP $FA10 F98B A5 B4 LDA $B4 F98D F0 1D BEQ $F9AC F98F 85 A8 STA $A8 F991 D0 19 BNE $F9AC F993 E6 A9 INC $A9 F995 B0 02 BCS $F999 F997 C6 A9 DEC $A9 F999 38 SEC F99A E9 13 SBC #$13 F99C E5 B1 SBC $B1 F99E 65 92 ADC $92 F9A0 85 92 STA $92 F9A2 A5 A4 LDA $A4 F9A4 49 01 EOR #$01 F9A6 85 A4 STA $A4 F9A8 F0 2B BEQ $F9D5 F9AA 86 D7 STX $D7 F9AC A5 B4 LDA $B4 F9AE F0 22 BEQ $F9D2 F9B0 AD A3 02 LDA $02A3 F9B3 29 01 AND #$01 F9B5 D0 05 BNE $F9BC F9B7 AD A4 02 LDA $02A4 F9BA D0 16 BNE $F9D2 F9BC A9 00 LDA #$00 F9BE 85 A4 STA $A4 F9C0 8D A4 02 STA $02A4 F9C3 A5 A3 LDA $A3 F9C5 10 30 BPL $F9F7 F9C7 30 BF BMI $F988 F9C9 A2 A6 LDX #$A6 F9CB 20 E2 F8 JSR $F8E2 F9CE A5 9B LDA $9B F9D0 D0 B9 BNE $F98B F9D2 4C BC FE JMP $FEBC F9D5 A5 92 LDA $92 F9D7 F0 07 BEQ $F9E0 F9D9 30 03 BMI $F9DE F9DB C6 B0 DEC $B0 F9DD .BY $2C F9DE E6 B0 INC $B0 F9E0 A9 00 LDA #$00 F9E2 85 92 STA $92 F9E4 E4 D7 CPX $D7 F9E6 D0 0F BNE $F9F7 F9E8 8A TXA F9E9 D0 A0 BNE $F98B F9EB A5 A9 LDA $A9 F9ED 30 BD BMI $F9AC F9EF C9 10 CMP #$10 F9F1 90 B9 BCC $F9AC F9F3 85 96 STA $96 F9F5 B0 B5 BCS $F9AC F9F7 8A TXA F9F8 45 9B EOR $9B F9FA 85 9B STA $9B F9FC A5 B4 LDA $B4 F9FE F0 D2 BEQ $F9D2 FA00 C6 A3 DEC $A3 FA02 30 C5 BMI $F9C9 FA04 46 D7 LSR $D7 FA06 66 BF ROR $BF FA08 A2 DA LDX #$DA FA0A 20 E2 F8 JSR $F8E2 FA0D 4C BC FE JMP $FEBC FA10 A5 96 LDA $96 FA12 F0 04 BEQ $FA18 FA14 A5 B4 LDA $B4 FA16 F0 07 BEQ $FA1F FA18 A5 A3 LDA $A3 FA1A 30 03 BMI $FA1F FA1C 4C 97 F9 JMP $F997 FA1F 46 B1 LSR $B1 FA21 A9 93 LDA #$93 FA23 38 SEC FA24 E5 B1 SBC $B1 FA26 65 B0 ADC $B0 FA28 0A ASL FA29 AA TAX FA2A 20 E2 F8 JSR $F8E2 FA2D E6 9C INC $9C FA2F A5 B4 LDA $B4 FA31 D0 11 BNE $FA44 FA33 A5 96 LDA $96 FA35 F0 26 BEQ $FA5D FA37 85 A8 STA $A8 FA39 A9 00 LDA #$00 FA3B 85 96 STA $96 FA3D A9 81 LDA #$81 FA3F 8D 0D DC STA $DC0D FA42 85 B4 STA $B4 FA44 A5 96 LDA $96 FA46 85 B5 STA $B5 FA48 F0 09 BEQ $FA53 FA4A A9 00 LDA #$00 FA4C 85 B4 STA $B4 FA4E A9 01 LDA #$01 FA50 8D 0D DC STA $DC0D FA53 A5 BF LDA $BF FA55 85 BD STA $BD FA57 A5 A8 LDA $A8 FA59 05 A9 ORA $A9 FA5B 85 B6 STA $B6 FA5D 4C BC FE JMP $FEBC ; receive next byte from cassette FA60 20 97 FB JSR $FB97 FA63 85 9C STA $9C FA65 A2 DA LDX #$DA FA67 20 E2 F8 JSR $F8E2 FA6A A5 BE LDA $BE FA6C F0 02 BEQ $FA70 FA6E 85 A7 STA $A7 FA70 A9 0F LDA #$0F FA72 24 AA BIT $AA FA74 10 17 BPL $FA8D FA76 A5 B5 LDA $B5 FA78 D0 0C BNE $FA86 FA7A A6 BE LDX $BE FA7C CA DEX FA7D D0 0B BNE $FA8A FA7F A9 08 LDA #$08 FA81 20 1C FE JSR $FE1C FA84 D0 04 BNE $FA8A FA86 A9 00 LDA #$00 FA88 85 AA STA $AA FA8A 4C BC FE JMP $FEBC FA8D 70 31 BVS $FAC0 FA8F D0 18 BNE $FAA9 FA91 A5 B5 LDA $B5 FA93 D0 F5 BNE $FA8A FA95 A5 B6 LDA $B6 FA97 D0 F1 BNE $FA8A FA99 A5 A7 LDA $A7 FA9B 4A LSR FA9C A5 BD LDA $BD FA9E 30 03 BMI $FAA3 FAA0 90 18 BCC $FABA FAA2 18 CLC FAA3 B0 15 BCS $FABA FAA5 29 0F AND #$0F FAA7 85 AA STA $AA FAA9 C6 AA DEC $AA FAAB D0 DD BNE $FA8A FAAD A9 40 LDA #$40 FAAF 85 AA STA $AA FAB1 20 8E FB JSR $FB8E FAB4 A9 00 LDA #$00 FAB6 85 AB STA $AB FAB8 F0 D0 BEQ $FA8A FABA A9 80 LDA #$80 FABC 85 AA STA $AA FABE D0 CA BNE $FA8A FAC0 A5 B5 LDA $B5 FAC2 F0 0A BEQ $FACE FAC4 A9 04 LDA #$04 FAC6 20 1C FE JSR $FE1C FAC9 A9 00 LDA #$00 FACB 4C 4A FB JMP $FB4A FACE 20 D1 FC JSR $FCD1 FAD1 90 03 BCC $FAD6 FAD3 4C 48 FB JMP $FB48 FAD6 A6 A7 LDX $A7 FAD8 CA DEX FAD9 F0 2D BEQ $FB08 FADB A5 93 LDA $93 FADD F0 0C BEQ $FAEB FADF A0 00 LDY #$00 FAE1 A5 BD LDA $BD FAE3 D1 AC CMP ($AC),Y FAE5 F0 04 BEQ $FAEB FAE7 A9 01 LDA #$01 FAE9 85 B6 STA $B6 FAEB A5 B6 LDA $B6 FAED F0 4B BEQ $FB3A FAEF A2 3D LDX #$3D FAF1 E4 9E CPX $9E FAF3 90 3E BCC $FB33 FAF5 A6 9E LDX $9E FAF7 A5 AD LDA $AD FAF9 9D 01 01 STA $0101,X FAFC A5 AC LDA $AC FAFE 9D 00 01 STA $0100,X FB01 E8 INX FB02 E8 INX FB03 86 9E STX $9E FB05 4C 3A FB JMP $FB3A FB08 A6 9F LDX $9F FB0A E4 9E CPX $9E FB0C F0 35 BEQ $FB43 FB0E A5 AC LDA $AC FB10 DD 00 01 CMP $0100,X FB13 D0 2E BNE $FB43 FB15 A5 AD LDA $AD FB17 DD 01 01 CMP $0101,X FB1A D0 27 BNE $FB43 FB1C E6 9F INC $9F FB1E E6 9F INC $9F FB20 A5 93 LDA $93 FB22 F0 0B BEQ $FB2F FB24 A5 BD LDA $BD FB26 A0 00 LDY #$00 FB28 D1 AC CMP ($AC),Y FB2A F0 17 BEQ $FB43 FB2C C8 INY FB2D 84 B6 STY $B6 FB2F A5 B6 LDA $B6 FB31 F0 07 BEQ $FB3A FB33 A9 10 LDA #$10 FB35 20 1C FE JSR $FE1C FB38 D0 09 BNE $FB43 FB3A A5 93 LDA $93 FB3C D0 05 BNE $FB43 FB3E A8 TAY FB3F A5 BD LDA $BD FB41 91 AC STA ($AC),Y FB43 20 DB FC JSR $FCDB FB46 D0 43 BNE $FB8B FB48 A9 80 LDA #$80 FB4A 85 AA STA $AA FB4C 78 SEI FB4D A2 01 LDX #$01 FB4F 8E 0D DC STX $DC0D FB52 AE 0D DC LDX $DC0D FB55 A6 BE LDX $BE FB57 CA DEX FB58 30 02 BMI $FB5C FB5A 86 BE STX $BE FB5C C6 A7 DEC $A7 FB5E F0 08 BEQ $FB68 FB60 A5 9E LDA $9E FB62 D0 27 BNE $FB8B FB64 85 BE STA $BE FB66 F0 23 BEQ $FB8B FB68 20 93 FC JSR $FC93 FB6B 20 8E FB JSR $FB8E FB6E A0 00 LDY #$00 FB70 84 AB STY $AB FB72 B1 AC LDA ($AC),Y FB74 45 AB EOR $AB FB76 85 AB STA $AB FB78 20 DB FC JSR $FCDB FB7B 20 D1 FC JSR $FCD1 FB7E 90 F2 BCC $FB72 FB80 A5 AB LDA $AB FB82 45 BD EOR $BD FB84 F0 05 BEQ $FB8B FB86 A9 20 LDA #$20 FB88 20 1C FE JSR $FE1C FB8B 4C BC FE JMP $FEBC ; move save/load address into $AC/$AD FB8E A5 C2 LDA $C2 FB90 85 AD STA $AD FB92 A5 C1 LDA $C1 FB94 85 AC STA $AC FB96 60 RTS ; initalise cassette read/write variables FB97 A9 08 LDA #$08 FB99 85 A3 STA $A3 FB9B A9 00 LDA #$00 FB9D 85 A4 STA $A4 FB9F 85 A8 STA $A8 FBA1 85 9B STA $9B FBA3 85 A9 STA $A9 FBA5 60 RTS ; schedule CIA1 timer B and ; invert casette write line FBA6 A5 BD LDA $BD FBA8 4A LSR FBA9 A9 60 LDA #$60 FBAB 90 02 BCC $FBAF FBAD A9 B0 LDA #$B0 FBAF A2 00 LDX #$00 FBB1 8D 06 DC STA $DC06 FBB4 8E 07 DC STX $DC07 FBB7 AD 0D DC LDA $DC0D FBBA A9 19 LDA #$19 FBBC 8D 0F DC STA $DC0F FBBF A5 01 LDA $01 FBC1 49 08 EOR #$08 FBC3 85 01 STA $01 FBC5 29 08 AND #$08 FBC7 60 RTS ; IRQ routine for cassette write B FBC8 38 SEC FBC9 66 B6 ROR $B6 FBCB 30 3C BMI $FC09 FBCD A5 A8 LDA $A8 FBCF D0 12 BNE $FBE3 FBD1 A9 10 LDA #$10 FBD3 A2 01 LDX #$01 FBD5 20 B1 FB JSR $FBB1 FBD8 D0 2F BNE $FC09 FBDA E6 A8 INC $A8 FBDC A5 B6 LDA $B6 FBDE 10 29 BPL $FC09 FBE0 4C 57 FC JMP $FC57 FBE3 A5 A9 LDA $A9 FBE5 D0 09 BNE $FBF0 FBE7 20 AD FB JSR $FBAD FBEA D0 1D BNE $FC09 FBEC E6 A9 INC $A9 FBEE D0 19 BNE $FC09 FBF0 20 A6 FB JSR $FBA6 FBF3 D0 14 BNE $FC09 FBF5 A5 A4 LDA $A4 FBF7 49 01 EOR #$01 FBF9 85 A4 STA $A4 FBFB F0 0F BEQ $FC0C FBFD A5 BD LDA $BD FBFF 49 01 EOR #$01 FC01 85 BD STA $BD FC03 29 01 AND #$01 FC05 45 9B EOR $9B FC07 85 9B STA $9B FC09 4C BC FE JMP $FEBC FC0C 46 BD LSR $BD FC0E C6 A3 DEC $A3 FC10 A5 A3 LDA $A3 FC12 F0 3A BEQ $FC4E FC14 10 F3 BPL $FC09 FC16 20 97 FB JSR $FB97 FC19 58 CLI FC1A A5 A5 LDA $A5 FC1C F0 12 BEQ $FC30 FC1E A2 00 LDX #$00 FC20 86 D7 STX $D7 FC22 C6 A5 DEC $A5 FC24 A6 BE LDX $BE FC26 E0 02 CPX #$02 FC28 D0 02 BNE $FC2C FC2A 09 80 ORA #$80 FC2C 85 BD STA $BD FC2E D0 D9 BNE $FC09 FC30 20 D1 FC JSR $FCD1 FC33 90 0A BCC $FC3F FC35 D0 91 BNE $FBC8 FC37 E6 AD INC $AD FC39 A5 D7 LDA $D7 FC3B 85 BD STA $BD FC3D B0 CA BCS $FC09 FC3F A0 00 LDY #$00 FC41 B1 AC LDA ($AC),Y FC43 85 BD STA $BD FC45 45 D7 EOR $D7 FC47 85 D7 STA $D7 FC49 20 DB FC JSR $FCDB FC4C D0 BB BNE $FC09 FC4E A5 9B LDA $9B FC50 49 01 EOR #$01 FC52 85 BD STA $BD FC54 4C BC FE JMP $FEBC FC57 C6 BE DEC $BE FC59 D0 03 BNE $FC5E FC5B 20 CA FC JSR $FCCA FC5E A9 50 LDA #$50 FC60 85 A7 STA $A7 FC62 A2 08 LDX #$08 FC64 78 SEI FC65 20 BD FC JSR $FCBD FC68 D0 EA BNE $FC54 ; IRQ routine for cassette write A FC6A A9 78 LDA #$78 FC6C 20 AF FB JSR $FBAF FC6F D0 E3 BNE $FC54 FC71 C6 A7 DEC $A7 FC73 D0 DF BNE $FC54 FC75 20 97 FB JSR $FB97 FC78 C6 AB DEC $AB FC7A 10 D8 BPL $FC54 FC7C A2 0A LDX #$0A FC7E 20 BD FC JSR $FCBD FC81 58 CLI FC82 E6 AB INC $AB FC84 A5 BE LDA $BE FC86 F0 30 BEQ $FCB8 FC88 20 8E FB JSR $FB8E FC8B A2 09 LDX #$09 FC8D 86 A5 STX $A5 FC8F 86 B6 STX $B6 FC91 D0 83 BNE $FC16 ; switch from cassette IRQ to default IRQ FC93 08 PHP FC94 78 SEI FC95 AD 11 D0 LDA $D011 FC98 09 10 ORA #$10 FC9A 8D 11 D0 STA $D011 FC9D 20 CA FC JSR $FCCA FCA0 A9 7F LDA #$7F FCA2 8D 0D DC STA $DC0D FCA5 20 DD FD JSR $FDDD FCA8 AD A0 02 LDA $02A0 FCAB F0 09 BEQ $FCB6 FCAD 8D 15 03 STA $0315 FCB0 AD 9F 02 LDA $029F FCB3 8D 14 03 STA $0314 FCB6 28 PLP FCB7 60 RTS ; terminate cassette I/O FCB8 20 93 FC JSR $FC93 FCBB F0 97 BEQ $FC54 ; set IRQ vector depending on X FCBD BD 93 FD LDA $FD93,X FCC0 8D 14 03 STA $0314 FCC3 BD 94 FD LDA $FD94,X FCC6 8D 15 03 STA $0315 FCC9 60 RTS ; stop cassette motor FCCA A5 01 LDA $01 FCCC 09 20 ORA #$20 FCCE 85 01 STA $01 FCD0 60 RTS ; compare $AC/$AD with $AE/$AF FCD1 38 SEC FCD2 A5 AC LDA $AC FCD4 E5 AE SBC $AE FCD6 A5 AD LDA $AD FCD8 E5 AF SBC $AF FCDA 60 RTS ; increment $AC/$AD FCDB E6 AC INC $AC FCDD D0 02 BNE $FCE1 FCDF E6 AD INC $AD FCE1 60 RTS ; RESET routine FCE2 A2 FF LDX #$FF FCE4 78 SEI FCE5 9A TXS FCE6 D8 CLD FCE7 20 02 FD JSR $FD02 FCEA D0 03 BNE $FCEF FCEC 6C 00 80 JMP ($8000) ; start cartridge FCEF 8E 16 D0 STX $D016 FCF2 20 A3 FD JSR $FDA3 FCF5 20 50 FD JSR $FD50 FCF8 20 15 FD JSR $FD15 FCFB 20 5B FF JSR $FF5B FCFE 58 CLI FCFF 6C 00 A0 JMP ($A000) ; start basic ; check for a cartridge FD02 A2 05 LDX #$05 FD04 BD 0F FD LDA $FD0F,X FD07 DD 03 80 CMP $8003,X FD0A D0 03 BNE $FD0F FD0C CA DEX FD0D D0 F5 BNE $FD04 FD0F 60 RTS ; CBM80 FD10 .BY $C3,$C2,$CD,$38,$30 ; restore I/O vectors FD15 A2 30 LDX #$30 ; low FD30 FD17 A0 FD LDY #$FD ; high FD30 FD19 18 CLC ; set I/O vectors depending on XY FD1A 86 C3 STX $C3 FD1C 84 C4 STY $C4 FD1E A0 1F LDY #$1F FD20 B9 14 03 LDA $0314,Y FD23 B0 02 BCS $FD27 FD25 B1 C3 LDA ($C3),Y FD27 91 C3 STA ($C3),Y FD29 99 14 03 STA $0314,Y FD2C 88 DEY FD2D 10 F1 BPL $FD20 FD2F 60 RTS ; vectors for OS at $0314-$0333 FD30 .WD $EA31 ; IRQ FD32 .WD $FE66 ; BRK FD34 .WD $FE47 ; NMI FD36 .WD $F34A ; open FD38 .WD $F291 ; close FD3A .WD $F20E ; set input dev FD3C .WD $F250 ; set output dev FD3E .WD $F333 ; restore I/O FD40 .WD $F157 ; input FD42 .WD $F1CA ; output FD44 .WD $F6ED ; test stop key FD46 .WD $F13E ; get FD48 .WD $F32F ; abort I/O FD4A .WD $FE66 ; unused (BRK) FD4C .WD $F4A5 ; load ram FD4E .WD $F5ED ; save ram ; initalise memory pointers FD50 A9 00 LDA #$00 FD52 A8 TAY FD53 99 02 00 STA $0002,Y FD56 99 00 02 STA $0200,Y FD59 99 00 03 STA $0300,Y FD5C C8 INY FD5D D0 F4 BNE $FD53 FD5F A2 3C LDX #$3C FD61 A0 03 LDY #$03 FD63 86 B2 STX $B2 FD65 84 B3 STY $B3 FD67 A8 TAY FD68 A9 03 LDA #$03 FD6A 85 C2 STA $C2 FD6C E6 C2 INC $C2 FD6E B1 C1 LDA ($C1),Y FD70 AA TAX FD71 A9 55 LDA #$55 FD73 91 C1 STA ($C1),Y FD75 D1 C1 CMP ($C1),Y FD77 D0 0F BNE $FD88 FD79 2A ROL FD7A 91 C1 STA ($C1),Y FD7C D1 C1 CMP ($C1),Y FD7E D0 08 BNE $FD88 FD80 8A TXA FD81 91 C1 STA ($C1),Y FD83 C8 INY FD84 D0 E8 BNE $FD6E FD86 F0 E4 BEQ $FD6C FD88 98 TYA FD89 AA TAX FD8A A4 C2 LDY $C2 FD8C 18 CLC FD8D 20 2D FE JSR $FE2D FD90 A9 08 LDA #$08 FD92 8D 82 02 STA $0282 FD95 A9 04 LDA #$04 FD97 8D 88 02 STA $0288 FD9A 60 RTS ; IRQ vectors FD9B .WD $FC6A ; cassette write A FD9D .WD $FBCD ; cassette write B FD9F .WD $EA31 ; standard IRQ FDA1 .WD $F92C ; cassette read ; initaliase I/O devices FDA3 A9 7F LDA #$7F FDA5 8D 0D DC STA $DC0D FDA8 8D 0D DD STA $DD0D FDAB 8D 00 DC STA $DC00 FDAE A9 08 LDA #$08 FDB0 8D 0E DC STA $DC0E FDB3 8D 0E DD STA $DD0E FDB6 8D 0F DC STA $DC0F FDB9 8D 0F DD STA $DD0F FDBC A2 00 LDX #$00 FDBE 8E 03 DC STX $DC03 FDC1 8E 03 DD STX $DD03 FDC4 8E 18 D4 STX $D418 FDC7 CA DEX FDC8 8E 02 DC STX $DC02 FDCB A9 07 LDA #$07 FDCD 8D 00 DD STA $DD00 FDD0 A9 3F LDA #$3F FDD2 8D 02 DD STA $DD02 FDD5 A9 E7 LDA #$E7 FDD7 85 01 STA $01 FDD9 A9 2F LDA #$2F FDDB 85 00 STA $00 ; initalise TAL1/TAH1 fpr 1/60 of a second FDDD AD A6 02 LDA $02A6 FDE0 F0 0A BEQ $FDEC FDE2 A9 25 LDA #$25 FDE4 8D 04 DC STA $DC04 FDE7 A9 40 LDA #$40 FDE9 4C F3 FD JMP $FDF3 FDEC A9 95 LDA #$95 FDEE 8D 04 DC STA $DC04 FDF1 A9 42 LDA #$42 FDF3 8D 05 DC STA $DC05 FDF6 4C 6E FF JMP $FF6E ; initalise file name parameters FDF9 85 B7 STA $B7 FDFB 86 BB STX $BB FDFD 84 BC STY $BC FDFF 60 RTS ; inatalise file parameters FE00 85 B8 STA $B8 FE02 86 BA STX $BA FE04 84 B9 STY $B9 FE06 60 RTS ; read I/O status word FE07 A5 BA LDA $BA FE09 C9 02 CMP #$02 FE0B D0 0D BNE $FE1A FE0D AD 97 02 LDA $0297 FE10 48 PHA FE11 A9 00 LDA #$00 FE13 8D 97 02 STA $0297 FE16 68 PLA FE17 60 RTS ; control kernel messages FE18 85 9D STA $9D ; read ST FE1A A5 90 LDA $90 ; add A to ST FE1C 05 90 ORA $90 FE1E 85 90 STA $90 FE20 60 RTS ; set timeout on serail bus FE21 8D 85 02 STA $0285 FE24 60 RTS ; read/set top of memory FE25 90 06 BCC $FE2D FE27 AE 83 02 LDX $0283 FE2A AC 84 02 LDY $0284 FE2D 8E 83 02 STX $0283 FE30 8C 84 02 STY $0284 FE33 60 RTS ; read/set bottom of memory FE34 90 06 BCC $FE3C FE36 AE 81 02 LDX $0281 FE39 AC 82 02 LDY $0282 FE3C 8E 81 02 STX $0281 FE3F 8C 82 02 STY $0282 FE42 60 RTS ; NMI entry FE43 78 SEI FE44 6C 18 03 JMP ($0318) ; normally FE47 ; standard NMI routine FE47 48 PHA FE48 8A TXA FE49 48 PHA FE4A 98 TYA FE4B 48 PHA FE4C A9 7F LDA #$7F FE4E 8D 0D DD STA $DD0D FE51 AC 0D DD LDY $DD0D FE54 30 1C BMI $FE72 FE56 20 02 FD JSR $FD02 FE59 D0 03 BNE $FE5E FE5B 6C 02 80 JMP ($8002) ; cartridge warm start FE5E 20 BC F6 JSR $F6BC FE61 20 E1 FF JSR $FFE1 FE64 D0 0C BNE $FE72 ; BRK routine FE66 20 15 FD JSR $FD15 FE69 20 A3 FD JSR $FDA3 FE6C 20 18 E5 JSR $E518 FE6F 6C 02 A0 JMP ($A002) ; internal NMI FE72 98 TYA FE73 2D A1 02 AND $02A1 FE76 AA TAX FE77 29 01 AND #$01 FE79 F0 28 BEQ $FEA3 FE7B AD 00 DD LDA $DD00 FE7E 29 FB AND #$FB FE80 05 B5 ORA $B5 FE82 8D 00 DD STA $DD00 FE85 AD A1 02 LDA $02A1 FE88 8D 0D DD STA $DD0D FE8B 8A TXA FE8C 29 12 AND #$12 FE8E F0 0D BEQ $FE9D FE90 29 02 AND #$02 FE92 F0 06 BEQ $FE9A FE94 20 D6 FE JSR $FED6 FE97 4C 9D FE JMP $FE9D FE9A 20 07 FF JSR $FF07 FE9D 20 BB EE JSR $EEBB FEA0 4C B6 FE JMP $FEB6 FEA3 8A TXA FEA4 29 02 AND #$02 FEA6 F0 06 BEQ $FEAE FEA8 20 D6 FE JSR $FED6 FEAB 4C B6 FE JMP $FEB6 FEAE 8A TXA FEAF 29 10 AND #$10 FEB1 F0 03 BEQ $FEB6 FEB3 20 07 FF JSR $FF07 FEB6 AD A1 02 LDA $02A1 FEB9 8D 0D DD STA $DD0D FEBC 68 PLA FEBD A8 TAY FEBE 68 PLA FEBF AA TAX FEC0 68 PLA FEC1 40 RTI ; baud rate tables FEC2 .WD $27C1 ; 50 FEC4 .WD $1A3E ; 75 FEC6 .WD $11C5 ; 110 FEC8 .WD $0E74 ; 134.5 FECA .WD $0CED ; 150 FECC .WD $0645 ; 300 FECE .WD $02F0 ; 600 FED0 .WD $0146 ; 1200 FED2 .WD $00B8 ; 1800 FED4 .WD $0071 ; 2400 ; input next bit on RS-232 and schedule TB2 FED6 AD 01 DD LDA $DD01 FED9 29 01 AND #$01 FEDB 85 A7 STA $A7 FEDD AD 06 DD LDA $DD06 FEE0 E9 1C SBC #$1C FEE2 6D 99 02 ADC $0299 FEE5 8D 06 DD STA $DD06 FEE8 AD 07 DD LDA $DD07 FEEB 6D 9A 02 ADC $029A FEEE 8D 07 DD STA $DD07 FEF1 A9 11 LDA #$11 FEF3 8D 0F DD STA $DD0F FEF6 AD A1 02 LDA $02A1 FEF9 8D 0D DD STA $DD0D FEFC A9 FF LDA #$FF FEFE 8D 06 DD STA $DD06 FF01 8D 07 DD STA $DD07 FF04 4C 59 EF JMP $EF59 ; schedule TB2 using baud rate factor FF07 AD 95 02 LDA $0295 FF0A 8D 06 DD STA $DD06 FF0D AD 96 02 LDA $0296 FF10 8D 07 DD STA $DD07 FF13 A9 11 LDA #$11 FF15 8D 0F DD STA $DD0F FF18 A9 12 LDA #$12 FF1A 4D A1 02 EOR $02A1 FF1D 8D A1 02 STA $02A1 FF20 A9 FF LDA #$FF FF22 8D 06 DD STA $DD06 FF25 8D 07 DD STA $DD07 FF28 AE 98 02 LDX $0298 FF2B 86 A8 STX $A8 FF2D 60 RTS ; continuation of baud rate calculation FF2E AA TAX FF2F AD 96 02 LDA $0296 FF32 2A ROL FF33 A8 TAY FF34 8A TXA FF35 69 C8 ADC #$C8 FF37 8D 99 02 STA $0299 FF3A 98 TYA FF3B 69 00 ADC #$00 FF3D 8D 9A 02 STA $029A FF40 60 RTS FF41 EA NOP FF42 EA NOP FF43 08 PHP FF44 68 PLA FF45 29 EF AND #$EF FF47 48 PHA ; IRQ entry point FF48 48 PHA FF49 8A TXA FF4A 48 PHA FF4B 98 TYA FF4C 48 PHA FF4D BA TSX FF4E BD 04 01 LDA $0104,X FF51 29 10 AND #$10 FF53 F0 03 BEQ $FF58 FF55 6C 16 03 JMP ($0316) ; normally FE66 FF58 6C 14 03 JMP ($0314) ; normally EA31 ; addition to I/O device initalisation FF5B 20 18 E5 JSR $E518 FF5E AD 12 D0 LDA $D012 FF61 D0 FB BNE $FF5E FF63 AD 19 D0 LDA $D019 FF66 29 01 AND #$01 FF68 8D A6 02 STA $02A6 FF6B 4C DD FD JMP $FDDD ; end of scheduling TA for 1/60 second IRQ's FF6E A9 81 LDA #$81 FF70 8D 0D DC STA $DC0D FF73 AD 0E DC LDA $DC0E FF76 29 80 AND #$80 FF78 09 11 ORA #$11 FF7A 8D 0E DC STA $DC0E FF7D 4C 8E EE JMP $EE8E FF80 .BY $03 ; kernal version number ; kernal vectors FF81 4C 5B FF JMP $FF5B ; initalise screen and keyboard FF84 4C A3 FD JMP $FDA3 ; initalise I/O devices FF87 4C 50 FD JMP $FD50 ; initalise memory pointers FF8A 4C 15 FD JMP $FD15 ; restore I/O vectors FF8D 4C 1A FD JMP $FD1A ; set I/O vectors from XY FF90 4C 18 FE JMP $FE18 ; control kernal messages FF93 4C B9 ED JMP $EDB9 ; read secondary address after listen FF96 4C C7 ED JMP $EDC7 ; read secondary address after talk FF99 4C 25 FE JMP $FE25 ; read/set top of memory FF9C 4C 34 FE JMP $FE34 ; read/set bottom of memory FF9F 4C 87 EA JMP $EA87 ; scan keyboard FFA2 4C 21 FE JMP $FE21 ; set timout for serial bus FFA5 4C 13 EE JMP $EE13 ; input on serial bus FFA8 4C DD ED JMP $EDDD ; output byte on serial bus FFAB 4C EF ED JMP $EDEF ; send untalk on serial bus FFAE 4C FE ED JMP $EDFE ; send unlisten on serial bus FFB1 4C 0C ED JMP $ED0C ; send listen on serial bus FFB4 4C 09 ED JMP $ED09 ; send talk on serial bus FFB7 4C 07 FE JMP $FE07 ; read I/O status word FFBA 4C 00 FE JMP $FE00 ; set file parameters FFBD 4C F9 FD JMP $FDF9 ; set filename parameters FFC0 6C 1A 03 JMP ($031A) ; (F34A) open a file FFC3 6C 1C 03 JMP ($031C) ; (F291) close a file FFC6 6C 1E 03 JMP ($031E) ; (F20E) set input device FFC9 6C 20 03 JMP ($0320) ; (F250) set output device FFCC 6C 22 03 JMP ($0322) ; (F333) restore I/O devices to default FFCF 6C 24 03 JMP ($0324) ; (F157) input char on current device FFD2 6C 26 03 JMP ($0326) ; (F1CA) output char on current device FFD5 4C 9E F4 JMP $F49E ; load ram from device FFD8 4C DD F5 JMP $F5DD ; save ram to device FFDB 4C E4 F6 JMP $F6E4 ; set real time clock FFDE 4C DD F6 JMP $F6DD ; read real time clock FFE1 6C 28 03 JMP ($0328) ; (F6ED) check stop key FFE4 6C 2A 03 JMP ($032A) ; (F13E) get a character FFE7 6C 2C 03 JMP ($032C) ; (F32F) close all channels and files FFEA 4C 9B F6 JMP $F69B ; increment real time clock FFED 4C 05 E5 JMP $E505 ; read organisation of screen into XY FFF0 4C 0A E5 JMP $E50A ; read/set XY cursor position FFF3 4C 00 E5 JMP $E500 ; read base address of I/O devices ; unused FFF6 .BY $52,$52,$42,$59 FFFA .WD $FE43 ; NMI vector FFFC .WD $FCE2 ; RESET vector FFFE .WD $FF48 ; IRQ/BRK vector Marko Mäkelä (Marko.Makela@HUT.FI)